Eaton ELC-PB, Programming Manual

Page: 257 / 728

E L C P r o g r a m m i n g M a n u a l
F o r m o r e i nf o r m a t i o n v i sit :
w w w. e a t o n . c o m
MN05003003E
3-88
API Mnemonic Operands Function
36 WSFR P
S, D, n
1
, n
2
Word Shift Right
Bit Devices Word devices Program Steps
Type
OP
X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * *
D * * * * * *
n
1
* *
n
2
* *
WSFR, WSFRP: 9 steps
ELC ELCB ELCM
PB PC/PA/PH PV PB PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P
Operands:
S
: Starting source address
D
: Starting destination address
n
1
: Length of data to be shifted
n
2
: Number of registers to be shifted as a group
Description:
1. Shift
n
1
registers of
S
to the right by
n
2
registers. Shift
n
2
registers of
D
to the most significant
registers of
S
.
2. This instruction works best with the pulse instruction (WSFRP).
3. When using operand
S
and
D
for bit data types, the data types must be equal. For example,
if one of these bit or word types is used for
S
, it must also be used for
D
: KnX, KnY, KnM,
KnS and the other kind is T, C, D.
4. When using operand
S
and
D
bit data types, the Kn value must be equal.
5. Valid range of operand
n1
,
n2
: 1 ≤
n2
≤
n1
≤ 512
Program Example 1:
1. When X0 OFF
→
ON, the registers starting at D20~D35 will shift 4 registers to the right. And
4 registers from D10 will shift into the upper registers of the destination.
2. Refer to the following n ~ r steps to perform WSFR instruction during a single scan.
n D23~D20
→
Carry
o D27~D24
→
D23~D20
p D31~D28
→
D27~D24
q D35~D32
→
D31~D28
r D13 ~D10
→
D35~D32 complete
X0
WSFRP D10 K16 D20 K4
D13 D12 D11 D10
D35 D34 D33 D32 D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20
1 2 3
4
5
4 registers in one group shift to the right
Carry