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2-122
D1178 VR0
value
D1179 VR1
value
Function explanation:
1.
This function only can be used at RUN mode. When M1178=ON, the variable value of VR 0
will be converted to digit 0~255 and saved in D1178. When M1179=ON, the variable value of
VR 1 will be converted to digit 0~255 and saved in D1179.
2.
Refer to instruction VRRD for detail.
Function Group
Interrupt instruction for reading pulse number
Number
D1180~D1181, D1198~D1199
Contents:
3.
In ELC-PC/PA/PH controllers, it is possible to use Interrupt instruction to read the value of
high-speed counter and store in D1180~D1181, D1198~D1199.
4. Function:
a) In ELC-PC/PA V1.2 and above, X0 (counter input) and X4 (external Interrupt) will
correspondingly work together with C235, C251, C253, and I401. Use D1180 and D1181
those are total 32 bit to set X0 and X4. X1 (counter input) and X5 (external Interrupt) will
correspondingly work together with C236 and I501. Use D1198 and D1199 those are total 32
bit to set X1 and X5.
b) In ELC-PH V1.2 and above, X10 (counter input) and X4 (external Interrupt) will
correspondingly work together with C243, C255 and I401. Use D1180 and D1181 those are
total 32 bit to set X10 and X4. X11 (counter input) and X5 (external Interrupt) will
correspondingly work together with C245 and I501. Use D1198 and D1199 those are total 32
bit to set X11 and X5.
Function Group
Power Loss Latched Range Setting
Number
D1200~D1219
Contents:
For ELC-PC/PA/PH/PV Controllers, to set latched range. The latched range will be from start
address number to end address number.
Function Group
Reverse Interrupt Trigger Pulse Direction
Number
M1280, M1284, M1286
Contents:
1.
The flags should be used with EI instruction and should be inserted before EI instruction
2. The default setting of interrupt I101 (X0) is rising-edge triggered. If M1280 is ON and EI
instruction is executed, the ELC will reverse the trigger direction as falling-edge triggered. The
trigger pulse direction of X1 will be set as rising-edge again by resetting M1280.
3.
When M0 = OFF, M1280 = OFF. X0 external interrupt will be triggered by rising-edge pulse.
Summary of Contents for ELC-PB
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