Eaton ELC-PB, Programming Manual

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3 . I n s t r u c t i o n S e t
M N050 03003E F or mo re infor ma tio n vi sit:
w w w. e a t o n . c o m
3-181
API Mnemonic Operands Function
62 D ABSD
S
1
, S
2
, D, n
Absolute Drum Sequencer
Bit Devices Word devices Program Steps
Type
OP
X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * *
S
2
* * *
D * * *
n * *
ABSD: 9 steps
DABSD: 17 steps
ELC ELCB ELCM
PB PC/PA/PH PV PB PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P
Operands:
S
1
: Starting address of the data compare file
S
2
: Counter number
D
: Starting address of
compare result
n
: Groups of multi-step comparison (
n
=1~64)
Description:
1. The ABSD instruction creates various output wave forms according to the current value of the
counter designated by
S
2.
The instruction is typically used for absolute cam control
applications.
2.
S
2
of DABSD specifies a high-speed, 32-bit counter. However, when the current value of the
high-speed counter is compared against the set-point value, the result cannot happen
immediately, because it is influenced by the scan time. If an immediate output is required, use
the DHSZ instruction.
3. When operand
S
1
uses KnX, KnY, KnM or KnS, where n=4 only a 16-bit instruction can be
used. Use K8 for the 32-bit instruction.
Program Example:
1. Before executing the ABSD instruction, preload the set-point values into D100~D107. The
contents of the even number D register is the lower-limit value and the contents of the odd
number D register is the upper-limit value.
2. When X20=ON, the current value of counter C10 is compared against the upper and
lower-limit values of D100~D107 (four groups). The compared result is displayed in M10~M13.
3. When X20=OFF, the origin ON/OFF state of M10~M13 will be unchanged.
X20
ABSD D100 C10 M10 K4
C10
RST C10
X21
CNT C10 K400
X21