Eaton ELC-PB, Programming Manual

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Programming Concepts
The Eaton Logic Controller (ELC) is a programmable logic controller spanning
an I/O range of 10 to 256 I/O points. ELC processors are so versatile they range
from nano to small application size without ever needing to change processors.
The ELC can control a wide variety of devices to solve your automation needs.
The ELC monitors inputs and manipulate outputs as controlled by the user
program. The user program provides features like boolean logic, counting,
timing, complex math operations, and communication with other products.
This Chapter Contains
2.1 ELC Memory Map for ELC-PB/ELCB-PB controllers ........................................................2-2
2.2 ELC Memory Map for ELC-PC/PA/PH controllers..............................................................2-4
2.3 ELC Memory Map for ELC-PV controllers..........................................................................2-7
2.4 ELC Memory Map for ELCM-PH/PA controllers...............................................................2-10
2.5 ELC Latched Memory Settings..........................................................................................2-13
2.6 ELC Latched Memory Modes ............................................................................................2-16
2.7 ELC Bits, Nibbles, Bytes, Words, etc ...............................................................................2-17
2.8 Binary, Octal, Decimal, BCD, Hex .....................................................................................2-17
2.9 Special M Relay...................................................................................................................2-20
2.10 S Relay.................................................................................................................................2-42
2.11 T (Timer) ..............................................................................................................................2-42
2.12 C (Counter) ..........................................................................................................................2-44
2.13 High-speed Counters .........................................................................................................2-46
2.14 Special Data Register .........................................................................................................2-56
2.15 E, F Index Registers ...........................................................................................................2-76
2.16 File Register ........................................................................................................................2-76
2.17 Nest Level Pointer[N], Pointer[P], Interrupt Pointer [I] ...................................................2-77
2.18 Applications of Special M Relay and Special D Register ...............................................2-82