Eaton ELC-PB, Programming Manual

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3 . I n s t r u c t i o n S e t
M N050 03003E F or mo re infor ma tio n vi sit:
w w w. e a t o n . c o m
3-71
API Mnemonic Operands Function
23 D DIV P
S
1
, S
2
, D
Division
Bit Devices Word devices Program Steps
Type
OP
X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * *
S
2
* * * * * * * * * *
D * * * * * * *
DIV, DIVP: 7 steps
DDIV, DDIVP: 13 steps
ELC ELCB ELCM
PB PC/PA/PH PV PB PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P
Operands:
S
1
: dividend
S
2
: divisor
D
: Quotient and Remainder
Description:
1. The primary source (
S
1
) is divided by the secondary source (
S
2
). The result is stored in the
destination (
D
).
2. This instruction is not executed when the divisor is “0”. Then, the flag M1067, M1068 = ON
and D1067 holds error code H0E19.
3. If operands
S
1
,
S
2,
D
use index F, then only the 16-bit instruction is available.
4. 16-bit instruction:
+1
= /
Quotient
Remainder
b15.............b00 b15.............b00 b15.............b00 b15.............b00
S
1
S
2
D D
If D is specified with a bit address, it must utilize K1 ~ K4 to store a 16-bit result. 2 consecutive
16-bit registers will be used to store the 32-bit data consisting of the quotient and remainder.
5. 32-bit instruction:
+1
/
=
+1 +1
b15..b00
Remainder
b15..b00 b15..b00 b15..b00 b31..b16 b15..b00 b31..b16 b15..b00
Quotient
S
1
S
1
S
2
S
2
D D
+3
D
+2
D
If D is specified with a bit address, it must utilize K1 ~ K8 to store a 32-bit result for ELC-PB,
ELCB-PB controllers. 4 consecutive 16-bit registers are used to store the quotient and
remainder for ELC-PC/PA/PH/PV, ELCM-PH/PA controllers.
Program Example:
When X0 = ON, the value in D0 (dividend) is divided by the value in D10 (divisor). The quotient is
stored in D20 and the remainder is stored in D21. The polarity of the result is indicated by the
OFF/ON of the most significant bit. OFF indicates the value of positive and ON indicates the value
of negative.
X0
DIV D0 D10 D20