E L C P r o g r a m m i n g M a n u a l
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3-420
API Mnemonic
Operands
Function
172
D ADDR P
S
1
, S
2
, D
Floating Point Number Addition
Bit Devices
Word devices
Program Steps
Type
OP
X Y M S K H KnX
KnY
KnM KnS T
C D E
F
S
1
*
S
2
*
D
*
DADDR: 13 steps
ELC ELCB
ELCM
PB PC/PA/PH
PV
PB PH/PA
32 16
P
32 16
P
32 16
P
32 16 P 32 16 P
Operands:
S
1
:
Floating point number
summand
S
2
:
Floating point number addend
D:
Sum
Description:
1. S
1
and S
2
are Floating point numbers
2. ELC-PB, ELCB-PB series models do not support index register E and F.
3. The DADDR operands, S
1
and S
2
can each be 2 D-register addresses or actual floating point
values (e.g. F1.2).
4. When
S
1
and S
2
use D registers, the function will be the same as
API
120 EADD.
5. If the absolute value of the operation result
> the
maximum floating point number, the carry flag
M1022=On.
6. If the absolute value of operation result < the minimum floating point number, the borrow flag
M1021=On.
7. If the operation result equals 0, the zero flag M1020=On.
Program Example 1:
When X0 = ON, add floating point number F1.200E+0 (enter F1.2, scientific notation F1.200E+0 will
be displayed in the instruction.) to F2.200E+0 and store the result F3.400E+0 in register D10 and
D11.
X0
DADDR F1.200E+0
D10
F2.200E+0
Program example 2:
When X0=On, store the result of (D1, D0)
+
(D3, D2) into (D11, D10).
X0
DADDR
D0
D2
D10
Summary of Contents for ELC-PB
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