RX610 Group
17. 8-Bit Timer (TMR)
R01UH0032EJ0120 Rev.1.20
Page 574 of 1006
Feb 20, 2013
17.3.2
Reset Input
Figure 17.4 shows an example of the 8-bit timer being used to generate a pulse which is output after a desired delay time
from a TMRIn input.
1.
Set the TCR.CCLR[1:0] bits to 11b (cleared by external reset input) and set the TMRIS bit in TCCR to high (cleared
when the external reset is high) so that TCNT is cleared at the high level input of the TMRIn signal.
2.
Set the TCSR.OSA[1:0] bits to 10b (high-output) and the TCSR.OSB[1:0] bits to 01b (low-output), causing the
output to change to high at a compare match of TCORA and to low at a compare match of TCORB.
With these settings, the 8-bit timer provides pulses output at a desired delay time from a TMRIn input determined by
TCORA and with a pulse width determined by TCORB and TCORA.
TCORA
TCORB
00h
TMRIn
TMOn
TCNT
(n = 0 to 3)
Figure 17.4 Example of Reset Input
Summary of Contents for RX600 Series
Page 1006: ...RX610 Group R01UH0032EJ0120 ...
