RX610 Group
15. 16-Bit Timer Pulse Unit (TPU)
R01UH0032EJ0120 Rev.1.20
Page 483 of 1006
Feb 20, 2013
15.2.8
Timer Start Register (TSTRA, TSTRB)
b7
b6
b5
b4
b3
b2
b1
b0
Value after reset:
0
0
0
0
0
0
0
0
—
—
CST5
CST4
CST3
CST2
CST1
CST0
Addresses: TSTRA 0008 8100h, TSTRB 0008 8170h
Bit
Symbol
Bit Name
Description
R/W
b0
CST0
Counter Start 0
0: TCNT count operation is stopped
1: TCNT performs count operation
R/W
b1
CST1
Counter Start 1
R/W
b2
CST2
Counter Start 2
R/W
b3
CST3
Counter Start 3
R/W
b4
CST4
Counter Start 4
R/W
b5
CST5
Counter Start 5
R/W
b7, b6
Reserved
These bits are read as 0. The write value should always be 0.
R/W
TSTRA starts or stops TCNT count operation for TPU0 to TPU5.
TSTRB starts or stops TCNT count operation for TPU6 to TPU11.
Before setting the operating mode in TPUm.TMDR or setting the TPUm.TCNT count clock in TPUm.TCR, stop the
TPUm.TCNT counter.
CSTj Bits (Counter Start) (j = 0 to 5)
These bits start or stop the TCNT counter.
When the CSTj bit is cleared to 0 with CSTj = 1 and the corresponding TIOCyn pin (y = A to D, n = 0 to 11) specified
for output, the counter stops but the output compare output level of the corresponding TIOCyn pin is retained.
If TIORH, TIORL, or TIOR is written to when the CSTj bit is 0, the pin output level will be changed to the set initial
output value.
Summary of Contents for RX600 Series
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