Renesas RX600 Series, User Manual

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RX610 Group 13. Data Transfer Controller (DTC)
R01UH0032EJ0120 Rev.1.20 Page 357 of 1006
Feb 20, 2013
13.4.5 Block Transfer Mode
This mode allows single-block data transfer on a single startup source.
Specify either transfer source or transfer destination for the block area by the DTS bit in MRB. The block size can be set
to 1 to 256 bytes (or 1 to 256 words or 1 to 256 longwords).
When transfer of the specified one block is completed, the initial values of the block size counter CRAL and the address
register (SAR when the DTS bit = 1 or DAR when the DTS bit = 0) specified in the block area are restored. The other
address register is incremented or decremented continuously or remains unchanged.
The transfer count (block count) can be set to 1 to 65536. This mode enables an interrupt request to the CPU to be
generated at the end of specified-count block transfer.
Table 13.9 lists register functions in block transfer mode, and figure 13.8 shows the memory map of block transfer mode.
Table 13.9 Register Functions in Block Transfer Mode
Register Description Value Written Back by Writing Transfer Data
SAR Transfer source address (When DTS bit in MRB is 0)
Increment/decrement/fixed
*
(When DTS bit in MRB is 1)
SAR register initial value
DAR Transfer destination address (When DTS bit in MRB is 0)
DAR register initial value
(When DTS bit in MRB is 1)
Increment/decrement/fixed
*
CRAH Retains block size CRAH
CRAL Block size counter CRAH
CRB Block transfer counter CRB - 1
Note:
*
Write-back is skipped in address-fixed mode.
Transfer source data area
Transfer destination data area
(set to block area)
Block area DAR
SAR
:
:
:
Transfer
N-th block
First block
Figure 13.8 Memory Map of Block Transfer Mode (Transfer Destination: Block Area)