Renesas RX600 Series, User Manual

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RX610 Group 9. Exceptions
R01UH0032EJ0120 Rev.1.20 Page 212 of 1006
Feb 20, 2013
9.6 Return from Exception Handling Routines
Executing the instructions listed in table 9.3 at the end of the corresponding exception handling routines restores the
values of the program counter (PC) and processor status word (PSW) that were saved on the stack or in the control
registers (BPC and BPSW) immediately before the exception handling sequence.
Table 9.3 Return from Exception Handling Routines
Exception Instruction for Return
Undefined instruction exception RTE
Privileged instruction exception RTE
Floating-point exceptions RTE
Reset Return is impossible
Non-maskable interrupt Return is impossible
Interrupts Fast interrupt RTFI
Other than the above RTE
Unconditional trap RTE
9.7 Order of Priority for Exceptions
The order of priority for exceptions is given in table 9.4. When multiple exceptions are generated at the same time, the
exception with the highest priority is accepted first.
Table 9.4 Order of Priority for Exceptions
Order of Priority Exception
High
Low
1 Reset
2 Non-maskable interrupt
3 Interrupts
4 Undefined instruction exception
Privileged instruction exception
5 Unconditional trap
6 Floating-point exceptions