RX610 Group
13. Data Transfer Controller (DTC)
R01UH0032EJ0120 Rev.1.20
Page 353 of 1006
Feb 20, 2013
13.4.2
Transfer Data Write-Back Skip Function
When the SM[1:0] bits in MRA or the DM[1:0] bits in MRB are set to "address fixed", a part of transfer data is not
written back. This function is performed independently of the setting of short-address mode or full-address mode. Table
13.6 lists transfer data write-back skip conditions and applicable registers.
The CRA and CRB registers are always written back independently of the setting of short-address mode or full-address
mode. Furthermore, in full-address mode, write-back of the MRA and MRB registers are always skipped.
Table 13.6 Transfer Data Write-Back Skip Conditions and Applicable Registers
SM[1:0] Bits in MRA
DM[1:0] Bits in MRB
SAR Register
DAR Register
b3
b2
b3
b2
0
0
0
0
Skip
Skip
0
0
0
1
0
1
0
0
0
1
0
1
0
0
1
0
Skip
Write-back
0
0
1
1
0
1
1
0
0
1
1
1
1
0
0
0
Write-back
Skip
1
0
0
1
1
1
0
0
1
1
0
1
1
0
1
0
Write-back
Write-back
1
0
1
1
1
1
1
0
1
1
1
1
Summary of Contents for RX600 Series
Page 1006: ...RX610 Group R01UH0032EJ0120 ...