102
Computing the Cycle Time
Section 2-7
been executed. The length of the interrupt response time for I/O interrupt
tasks depends on the following conditions. About 0.3 ms
Note
(1) The wait time occurs when there is competition with other interrupts. As
a guideline, the wait time will be 3 to 153
µ
s.
(2) I/O interrupt tasks can be executed during execution of the user program
(even while an instruction is being executed by stopping the execution of
an instruction), I/O refresh, peripheral servicing, or overseeing. The inter-
rupt response time is not affected by which of the above processing op-
erations during which the interrupt inputs turns ON. I/O interrupts,
however, are not executed during execution of other interrupt tasks even
if the I/O interrupt conditions are satisfied. Instead, the I/O interrupts are
executed in order of priority after the current interrupt task has completed
execution and the software interrupt response time has elapsed.
The interrupt response time of input interrupt tasks is calculated as follows:
Interrupt response time = Input ON delay + Software interrupt response time
Scheduled Interrupt Tasks
The interrupt response time of scheduled interrupt tasks is the time taken
from after the scheduled time specified by the MSKS(690) instruction has
elapsed until the interrupt task has actually been executed. The length of the
interrupt response time for scheduled interrupt tasks is 1 ms max. There is
also an error of 80
µ
s in the time to the first scheduled interrupt (0.5 ms min.).
Note
(1) Scheduled interrupt tasks can be executed during execution of the user
program (even while an instruction is being executed by stopping the ex-
ecution of an instruction), I/O refresh, peripheral servicing, or overseeing.
The interrupt response time is not affected by which of the above pro-
cessing operations during which the scheduled interrupt time occurs.
Scheduled interrupts, however, are not executed during execution of oth-
er interrupt tasks even if the interrupt conditions are satisfied. Instead, the
interrupts are executed in order of priority after the current interrupt task
has completed execution and the software interrupt response time has
elapsed.
Item
Interrupt response time
Counter interrupts
Hardware response
Rise time: 50
µ
s
---
Fall time: 50
µ
s
---
Software interrupt
response
Minimum: 98
µ
s
Minimum: 187
µ
s
Maximum: 198
µ
s + Wait
time (See note 1.)
Maximum: 287
µ
s + Wait time
(See note1.)
Input
(Interrupt signal retrieval)
Interrupt task execution
Software interrupt response time
Input ON delay
Cyclic task execution
(main program)
Ladder program
execution time
Next interrupt signal
can be accepted.
The time from completing the ladder program in the input
interrupt task until returning to cyclic task execution is 60
µ
s.
Input interrupt task
response time
Return time from
input interrupt task
Summary of Contents for Sysmac CP1H
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Page 3: ...CP1H X40D CP1H XA40D CP1H Y20DT D CP1H CPU Unit Operation Manual Revised October 2014...
Page 4: ...iv...
Page 10: ...x...
Page 18: ...xviii...
Page 22: ...xxii...
Page 34: ...xxxiv Conformance to EC Directives 6...
Page 76: ...42 Function Blocks Section 1 5...
Page 176: ...142 CP series Expansion I O Unit Wiring Section 3 6...
Page 372: ...338 Analog I O XA CPU Units Section 5 5...
Page 578: ...544 Trouble Shooting Section 8 7...
Page 622: ...588 Sample Application Section 9 12 Network Settings Network Tab Network Settings Driver Tab...
Page 668: ...634 Standard Models Appendix A...
Page 744: ...710 Auxiliary Area Allocations by Address Appendix D...
Page 771: ...737 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 772: ...738 Connections to Serial Communications Option Boards Appendix F...
Page 800: ...766 Specifications for External Power Supply Expansion Appendix H...
Page 806: ...772 Index W Work Area 165 work bits 165 work words 165 write protection 379...
Page 808: ...774 Revision History...
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