177
Index Registers
Section 4-15
4-15-2 Precautions for Using Index Registers
Precautions
Do not use a Index Register until a PLC memory address has been set in the
register. The pointer operation will be unreliable if the registers are used with-
out setting their values.
The values in Index Registers are unpredictable at the start of an interrupt
task. When an Index Register will be used in an interrupt task, always set a
PLC memory address in the Index Register with MOVR(560) or MOVRW(561)
before using the register in that task.
Each Index Register task is processed independently, so they do not affect
each other. For example, IR0 used in Task 1 and IR0 used in Task 2 are differ-
ent. Consequently, each Index Register task has 16 Index Registers.
++
D0
NEXT
JME
&1
MOVRW
T0
IR0
ON
The PLC memory address for the
PV area for TO is set in IR0.
,IR1+
,IR2+
MOVR
T0
IR1
The PLC memory address for the
Completion Flag for TO is set in IR1.
MOVR
W0.00
IR2
The PLC memory address for W0.00
is set in IR2.
MOV
&100
D0
The value &100 (100 decimal) is
set in D0.
If the above are not set, the FOR to
NEXT loop is not executed, and if
the above are set, the loop is executed.
When indirect addressing for IR2
is OFF, timers are started with indirect
addressing (auto-increment) for IR0 as
the timer number and indirect addressing
for D0 as the timer SV.
Indirect addressing for IR2 will turn ON
(auto-increment) when indirect addressing
for IR1 is ON (auto-increment).
D0 is incremented.
Return to FOR and repeat.
TIM
,IR0+
@D0
FOR
&100
,IR2
TIM
0000
D100
W0.00
T0000
W0.00
TIM
0001
D101
W0.01
T0001
W0.01
TIM
0099
D199
W6.03
T0099
W6.03
JMP
&1
Repeat execution of TIM instructions 100 times while incrementing each value for IR0
(timer number, PV), IR1 (Completion Flag), IR2 (W0.00 on), and @D0, and start T0 to T99.
Start of repetition (100 times)
Summary of Contents for Sysmac CP1H
Page 2: ......
Page 3: ...CP1H X40D CP1H XA40D CP1H Y20DT D CP1H CPU Unit Operation Manual Revised October 2014...
Page 4: ...iv...
Page 10: ...x...
Page 18: ...xviii...
Page 22: ...xxii...
Page 34: ...xxxiv Conformance to EC Directives 6...
Page 76: ...42 Function Blocks Section 1 5...
Page 176: ...142 CP series Expansion I O Unit Wiring Section 3 6...
Page 372: ...338 Analog I O XA CPU Units Section 5 5...
Page 578: ...544 Trouble Shooting Section 8 7...
Page 622: ...588 Sample Application Section 9 12 Network Settings Network Tab Network Settings Driver Tab...
Page 668: ...634 Standard Models Appendix A...
Page 744: ...710 Auxiliary Area Allocations by Address Appendix D...
Page 771: ...737 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 772: ...738 Connections to Serial Communications Option Boards Appendix F...
Page 800: ...766 Specifications for External Power Supply Expansion Appendix H...
Page 806: ...772 Index W Work Area 165 work bits 165 work words 165 write protection 379...
Page 808: ...774 Revision History...
Page 809: ......