375
Memory Cassette Functions
Section 6-5
• For XA CPU Units, the built-in analog output control is temporarily
stopped while a Memory Cassette data transfer or verification is in
progress. Therefore, if the IOM Hold Bit (A500.12) is ON and the exter-
nally transmitted analog output value is being held when the operating
mode is switched from RUN or MONITOR to PROGRAM and a Memory
Cassette data transfer or verification is executed, the analog output value
cannot be held during the transfer or verification and the value will be
changed. When the transfer or verification has been completed, the ana-
log output value will revert to the originally held value.
• The following table shows whether data transfers are enabled when the
CPU Unit is protected in various ways.
6-5-5
Procedure for Automatic Transfer from the Memory Cassette at
Startup
Use the following procedure to enable automatic transfer at startup.
1,2,3...
1.
Prepare a Memory Cassette with the required data stored.
2.
With the power supply turned OFF to the CPU Unit, remove the cover from
the Memory Cassette slot and insert the Memory Cassette.
3.
Open the cover for the CPU Unit's PERIPHERAL section and set DIP
switch pin SW2 to ON.
4.
Turn ON the power supply to the CPU Unit.
5.
The automatic transfer from the Memory Cassette will begin, and the
progress of the transfer will be displayed at the 7-segment LED indicator.
6.
After the automatic transfer has been completed, turn OFF the power sup-
ply to the CPU Unit.
Type of protection
Transfer from CPU Unit
to Memory Cassette
Transfer from Memory
Cassette to CPU Unit
Not protected.
Yes
Yes
System protected by DIP switch
pin SW1 set to ON.
Yes
No
Protected by password. Over-
writing and duplication both per-
mitted.
Yes
Yes
Protected by password. Over-
writing prohibited and duplica-
tion permitted.
Yes
Transfer enabled only at
startup.
Protected by password. Over-
writing permitted and duplica-
tion prohibited.
No
Yes
Protected by password. Over-
writing and duplication both pro-
hibited.
No
Transfer enabled only at
startup.
MEMORY
1 2 3 4
5 6
ON
DIP switch pin
SW2 set to ON.
Summary of Contents for Sysmac CP1H
Page 2: ......
Page 3: ...CP1H X40D CP1H XA40D CP1H Y20DT D CP1H CPU Unit Operation Manual Revised October 2014...
Page 4: ...iv...
Page 10: ...x...
Page 18: ...xviii...
Page 22: ...xxii...
Page 34: ...xxxiv Conformance to EC Directives 6...
Page 76: ...42 Function Blocks Section 1 5...
Page 176: ...142 CP series Expansion I O Unit Wiring Section 3 6...
Page 372: ...338 Analog I O XA CPU Units Section 5 5...
Page 578: ...544 Trouble Shooting Section 8 7...
Page 622: ...588 Sample Application Section 9 12 Network Settings Network Tab Network Settings Driver Tab...
Page 668: ...634 Standard Models Appendix A...
Page 744: ...710 Auxiliary Area Allocations by Address Appendix D...
Page 771: ...737 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 772: ...738 Connections to Serial Communications Option Boards Appendix F...
Page 800: ...766 Specifications for External Power Supply Expansion Appendix H...
Page 806: ...772 Index W Work Area 165 work bits 165 work words 165 write protection 379...
Page 808: ...774 Revision History...
Page 809: ......