Motorola MPC860 PowerQUICC, User Manual

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34-10 MPC860 PowerQUICC UserÕs Manual MOTOROLA
Part V. The Communications Processor Module
Table 34-7 describes PBODR bits.
34.3.1.2 Port B Data Register (PBDAT)
Reading the port B data register (PBDAT) returns data to the signal, regardless of whether
it is an input or output. This allows output conßicts to be found on the signal by comparing
the written data with the data on the signal. Data written to PBDAT is latched; if the
corresponding PBDIR bit is conÞgured as an output, the latched value is driven onto its
respective signal. PBDAT can be read or written at any time and is not initialized.
Table 34-2 describes PBDAT bits.
34.3.1.3 Port B Data Direction Register (PBDIR)
Port B data direction register (PBDIR) bits conÞgure port B signals as general-purpose
inputs or outputs. If a signal is not programmed for general-purpose I/O, PBDIR selects the
peripheral function to be performed.
Table 34-7, PBODR Bit Descriptions
Bits Name Description
0Ð15 Ñ Reserved
16Ð31 OD n Port B open-drain conÞguration.
0 The I/O signal is actively driven as an output.
1 The I/O signal is an open-drain driver. As an output, the signal is actively driven low. Otherwise,
it is three-stated.
Note that SMTXD1 cannot be conÞgured as an open-drain driver, regardless of PBODR[OD25].
Bits 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Field Ñ D14 D15
Reset UndeÞned
R/W Ñ R/W R/W
Addr 0xAC4
Bits 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Field D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31
Reset UndeÞned
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Addr 0xAC6
Figure 34-8. Port B Data Register (PBDAT)
Table 34-8. PBDAT Bit Descriptions
Bits Name Description
0Ð13 Ñ Reserved
14Ð31 D n Contains the data on the corresponding signal.