21-16
MPC860 PowerQUICC UserÕs Manual
MOTOROLA
Part V. The Communications Processor Module
Partition the frame from the beginning (the sync) to the end according to the support
needed:
¥
8 bits (B1)ÑSCC2
¥
1 bit (D)ÑSCC3 + strobe1
¥
1 bitÑNo support
¥
4 bits (B2)Ñstrobe2
¥
4 bits (B2)ÑSMC1
¥
1 bit (D)ÑSCC3 + strobe1
Each partition represents one SI RAM entry. Table 21-3 shows the SI RAM entries.
Because the IDL requires the same routing for both receiving and sending, the above entries
should be written to both the Rx and Tx route RAM. Set SIMODE[CRTx] (common
receive/transmit) to instruct the TSA to use the same clock and sync for both sets of SI
RAM entries.
For examples showing register programming, see Section 21.2.5.2, ÒProgramming the IDL
Interface,Ó and Section 21.2.6.3, ÒGCI Interface (SCIT Mode) Programming Example.Ó
21.2.4 The SI Registers
The following sections describe the SI registers.
21.2.4.1 SI Global Mode Register (SIGMR)
The SI global mode register (SIGMR), shown in Figure 21-12, deÞnes the SI RAM division
modes and enables the individual TDM channels.
Table 21-3. Example SI RAM Entry Settings for an IDL Bus
Entry
Number
SI RAM
SWTR
SSEL
CSEL
CNT
BYT
LST
Description
1
0
0000
010
0000
1
0
8 bits SCC2 (B1)
2
0
0001
011
0000
0
0
1 bit SCC3 strobe1 (D)
3
0
0000
000
0000
0
0
1 bit no support
4
0
0010
000
0011
0
0
4 bits strobe2 (B2)
5
0
0000
101
0011
0
0
4 bits SMC1 (B2)
6
0
0001
011
0000
0
1
1 bit SCC3 strobe1
Summary of Contents for MPC860 PowerQUICC
Page 3: ...MPC860UM AD 07 98 REV 1 MPC860 PowerQUICC ª UserÕs Manual ...
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Page 78: ...I iv MPC860 PowerQUICC UserÕs Manual MOTOROLA Part I Overview ...
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Page 114: ...3 16 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part I Overview ...
Page 226: ...8 32 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part II PowerPC Microprocessor Module ...
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Page 274: ...III iv MPC860 PowerQUICC UserÕs Manual MOTOROLA Part III Configuration ...
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Page 325: ...MOTOROLA Part IV Hardware Interface IV v Part IV Hardware Interface ...
Page 326: ...IV vi MPC860 PowerQUICC UserÕs Manual MOTOROLA Part IV Hardware Interface ...
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Page 998: ...37 48 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part VI Debug and Test ...
Page 1016: ...A 10 MPC860 PowerQUICC UserÕs Manual MOTOROLA Appendixes ...
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