Motorola MPC860 PowerQUICC, User Manual

Page: 922 / 1106

36-8 MPC860 PowerQUICC UserÕs Manual MOTOROLA
Part V. The Communications Processor Module
36.11.1 FIR1ÐReal C, Real X, and Real Y
Using the values provided in the parameter packet, FIR1 implements a basic Þnite-impulse
Þlter, shown in Figure 36-8, with K real coefÞcients, real input samples, and real output.
The input data is in a circular buffer with size (M+1) and the output data is in a circular
buffer with size (N+1).
Figure 36-8. FIR1 Function
36.11.1.1 FIR1 CoefÞcient, Input, and Output Buffers
The coefÞcient vector occupies K 16-bit entries in memory with C(0) stored in the Þrst
location. The 16-bit input samples are stored in order in a circular buffer containing (M+1)
bytes. The 16-bit outputs are stored consecutively in a circular buffer containing (N+1)
bytes. See Table 36-7.
1
Offset from base of the FD.
Table 36-6. FIR Parameter Packet
Offset
1
Name Description
0x2 I Number of iterations
0x4 K Number_of_taps - 1. The number of taps should be a multiple of four.
0x6 CBASE Filter coefÞcient vector base address
0x8 M Input buffer_size - 1. The minimum input buffer size is 8 (4 real or 2 complex samples).
0xA XYPTR Pointer to a structure composed of the input buffer pointer and the output buffer pointer
0xC N Output buffer_size - 1. When FD[X]=1, the minimum output buffer size is 8 (2 complex outputs);
when FD[X]=0, it is 4 (2 real outputs).
0xE Ñ Reserved
å
T
T
T
X(n)
{Real}
Y(n)
{Real}
C(0)
{Real}
C(1)
C(2)
C(k-1)
Y n
( )
C p
( )
X n p
Ð
( )
p 0 =
k 1
Ð
å
=