Motorola MPC860 PowerQUICC, User Manual, Page: 365 / 1106

MOTOROLA Chapter 14. MPC860 External Bus Interface 14-13
Part IV. Hardware Interface
Figure 14-10. Basic Timing: Single-Beat, 32-Bit Data Write Cycle, 16-Bit Port Size
14.4.3 Burst Transfers
The MPC860 or other synchronous external bus devices use burst transfers to access
16-byte operands. A burst accesses a 16-byte block aligned to a 16-byte memory boundary
by supplying a starting address that points to one of the words and requiring the memory
device to sequentially drive/sample each word on the data bus. The selected slave device
must internally increment A28 and A29 (and A30 in the case of a 16-bit port size slave
device) of the supplied address for each transfer, causing the address to wrap around at the
end of the four-word block. For slaves controlled by the memory controller, the MPC860
increments the address on A[28Ð31] and/or BADDR[28Ð30].
Address and transfer attributes supplied by the bus master remain stable during the
transfers; the selected device terminates each transfer by asserting TA after each word
transferred on the data bus. The MPC860 also supports burst-inhibited transfers for slave
devices that do not support bursting. For this type of cycle, the selected slave device
CLKOUT
BR
BG
BB
A[0Ð31]
R/W
TSIZ[0Ð1]
BURST
TS
Data
TA
STS
PS 10
ABCDEFGH EFGHEFGH
00 10
A A + 2