
MOTOROLA
Chapter 4. The PowerPC Core
4-11
Part II. PowerPC Microprocessor Module
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Pipelined operation. The LSU pipelines load accesses. Individual cache accesses of
all multiple-register instructions and unaligned accesses are pipelined into the data
cache interface.
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Load/store multiple and string instructions synchronize
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Load/store breakpoint/watchpoint detection support
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The LSU implements cache and TLB management instructions as special bus write
cycles, which are issued to the data cache interface.
Figure 4-5 is a block diagram of the LSU and its two queues. The address queue is a 2-entry
queue shared by all load/store instructions and the integer data queue is a 2-entry, 32-bit
queue that holds integer data.
The LSU has a dedicated writeback bus so that loaded data received from the internal bus
is written directly back to the GPRs.
Figure 4-5. LSU Functional Block Diagram
To execute multiple/string instructions and unaligned accesses, the LSU increments the EA
to access all necessary data. This allows the LSU to execute unaligned accesses without
stalling the master instruction pipeline.
Integer
Unit
GPRs
32-Bit
Integer
Load Data
32-Bit
Address
Integer
Store Data
Integer
Data Queue
LOAD/STORE
CORE
32-Bit
32-Bit
D-Cache/D-MMU
Interface
Address
Queue
and
Increment
32-Bit
32-Bit
UNIT
Summary of Contents for MPC860 PowerQUICC
Page 3: ...MPC860UM AD 07 98 REV 1 MPC860 PowerQUICC ª UserÕs Manual ...
Page 36: ...xxxvi MPC860 PowerQUICC UserÕs Manual MOTOROLA CONTENTS Paragraph Number Title Page Number ...
Page 78: ...I iv MPC860 PowerQUICC UserÕs Manual MOTOROLA Part I Overview ...
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Page 226: ...8 32 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part II PowerPC Microprocessor Module ...
Page 262: ...9 36 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part II PowerPC Microprocessor Module ...
Page 274: ...III iv MPC860 PowerQUICC UserÕs Manual MOTOROLA Part III Configuration ...
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Page 325: ...MOTOROLA Part IV Hardware Interface IV v Part IV Hardware Interface ...
Page 326: ...IV vi MPC860 PowerQUICC UserÕs Manual MOTOROLA Part IV Hardware Interface ...
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Page 632: ...21 44 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part V The Communications Processor Module ...
Page 660: ...22 28 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part V The Communications Processor Module ...
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Page 998: ...37 48 MPC860 PowerQUICC UserÕs Manual MOTOROLA Part VI Debug and Test ...
Page 1016: ...A 10 MPC860 PowerQUICC UserÕs Manual MOTOROLA Appendixes ...
Page 1024: ...B 8 MPC860 PowerQUICC UserÕs Manual MOTOROLA Appendixes ...
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