
2-7
Installation
Connecting to the Network
DS1 100
Ω,
2Mb/s 120
Ω
IN
PDH / DS1 receiver input interface. Allows the connection of 100
Ω
balanced DS1 and 120
Ω
balanced 2 Mb/s data signals.
DS1 100
Ω,
2Mb/s 120
Ω
OUT
PDH / DS1 transmitter output interface. Provides 100
Ω
balanced DS1
and 120
Ω
balanced 2 Mb/s data signals. A “keep alive” signal is output
when the transmit signal is SDH/SONET.
75
Ω
OUT 1
Replica of PDH / DSn OUT delayed by 4 bits at all rates except 140 Mb/s.
75
Ω
OUT 2
Replica of PDH / DSn OUT delayed by 8 bits at all rates except 140 Mb/s.
75
Ω
OUT 3
Replica of PDH / DSn OUT delayed by 12 bits at all rates except
140 Mb/s.
ERROR OUT
Provides an ECL pulse each time an error occurs. If 2 or more errors
occur within 16 clock periods only 1 pulse is output.
STM-1 IN
SDH receiver input interface. Allows the connection of 75
Ω
unbalanced
STM-1 electrical signals.
STM-1 OUT
SDH transmitter output interface. Provides a 75
Ω
unbalanced STM-1
electrical output.
EXT MTS CLOCK
Allows connection of a, 75
Ω
or 120
Ω
, timing reference as per CCITT
G.811. The reference format may be either clock or data. Options
US1[US5] and A1T[A1U] only.
CLOCK IN
Allows connection of SDH/SONET binary clock to Options 130 or 131.
CLOCK OUT
(Opt OYH)
Provides a STM-1/STM-4 binary clock from Options USN or UKT.
Summary of Contents for 37717C
Page 2: ...HP 37717C Communications Performance Analyzer Calibration Manual ...
Page 5: ...2 ...
Page 21: ...xviii Contents ...
Page 109: ...2 20 Installation Additional Precautions for Service Engineers ...
Page 312: ...3 203 Performance Tests Trigger Output Option UKZ Figure 3 57 Monitor Input Test Setup ...
Page 375: ...3 266 Performance Tests Performance Test Record ...
Page 379: ...4 4 Installation Current Previous Terminology ...
Page 392: ...B 9 Appendix B Fitting Calibrating Testing New Modules Typical Jitter Transmit Spectrum ...
Page 393: ...B 10 Appendix B Fitting Calibrating Testing New Modules ...