HP 37717C, Calibration Manual, Page: 117 / 399

3-8
Performance Tests
PDH Internal Transmitter Clocks (Options UKK, [USB], UKJ, [USA])
Frequency Offsets
10. Press and set up the
display as shown opposite.
11. Adjust the Frequency Counter ATTEN
and Trigger Level to obtain a stable reading
and ensure that the Frequency Counter
reads between 69632557.05 Hz
and69633531.91 Hz.
N OT E
At each step wait for the Status message "VCXO output Bit Rate settling" to clear
from the bottom line of the display before reading the frequency counter.
12. Select TX CLOCK OFFSET: [-15PPM], adjust the Frequency Counter Trigger
Level to obtain a stable reading and ensure that the Frequency Counter reads between
69630642.18 Hz and 69631268.86 Hz.
13. Select TX CLOCK OFFSET: [USER OFFSET] [+100PPM] and ensure that the
Frequency Counter reads between 69638649.86 Hz and 69639276.54 Hz.
14. Select TX CLOCK OFFSET: [USER OFFSET] [-100PPM], adjust the Frequency
Counter Trigger Level to obtain a stable reading and ensure that the Frequency
Counter reads between 69624723.46 Hz and 69625350.14 Hz.
15. Select each BIT RATE and TX CLOCK OFFSET listed in Table 3-1.
16. For each selection adjust the Frequency Counter ATTEN and Trigger Level to
obtain a stable reading and ensure that the Frequency Counter reads between the
limits listed in Table 3-1.
TRANSMIT