
3-77
Performance Tests
Internal SDH Transmitter Clock (Options US1, [US5], A1T, [A1U], A3R
[A3S])
Internal SDH Transmitter Clock (Options US1, [US5],
A1T, [A1U], A3R [A3S])
Specification
Description
The test uses a Frequency Counter connected to the SDH Signal Out port to measure
the STM-1 All Ones data rate. This gives an indirect measure of the transmitter
clock frequency as the data is clocked by the internal 10MHz clock oscillator. The
test limits assume the instrument is within the annual calibration cycle. The STM-1
Framing is disabled for this test using the MODULE DEBUG function of the HP
37717C.
Equipment Required
Procedure
1. Recall the HP 37717C DEFAULT SETTINGS as shown on 3-2.
2. Connect the HP 37717C STM-1 OUT port to the Frequency Counter Input A,
terminated in 75
Ω
(use the T Connector).
Bit Rate
Accuracy
155.52 Mb/s
±
4.5 ppm
Frequency Counter
: HP 5335A Option 010
75
Ω
Termination
: HP 15522-80010
T Connector
: HP 1250-0781
Summary of Contents for 37717C
Page 2: ...HP 37717C Communications Performance Analyzer Calibration Manual ...
Page 5: ...2 ...
Page 21: ...xviii Contents ...
Page 109: ...2 20 Installation Additional Precautions for Service Engineers ...
Page 312: ...3 203 Performance Tests Trigger Output Option UKZ Figure 3 57 Monitor Input Test Setup ...
Page 375: ...3 266 Performance Tests Performance Test Record ...
Page 379: ...4 4 Installation Current Previous Terminology ...
Page 392: ...B 9 Appendix B Fitting Calibrating Testing New Modules Typical Jitter Transmit Spectrum ...
Page 393: ...B 10 Appendix B Fitting Calibrating Testing New Modules ...