
3-174
Performance Tests
PDH Binary Interfaces (Option UH3, [US7])
8. Press
and set up the display as shown opposite.
9. Set the Signal Generator to Frequency -
170 MHz, Output Level - 500 mV and
connect to the EXT CLOCK input port of
the binary interfaces module.
10. Connect the HP 37717C binary
CLOCK O/P to the oscilloscope via the
75
Ω
/50
Ω
matching pad and the ECL
termination and check that the mark/space
ratio of the displayed clock waveform is
between 60/40 and 40/60.
Structured PDH Option UKJ [USA]
1. Press
and set up the display as
shown opposite.
2. Press
and set up the display as shown opposite.
3. Set the Signal Generator to Frequency -
1.843 MHz, Output Level - 500 mV and
connect to the EXT CLOCK input port of
the binary interfaces module.
4. Connect the HP 37717C binary
CLOCK O/P to the oscilloscope via the
75
Ω
/50
Ω
matching pad and check that the
mark/space ratio of the displayed clock
waveform is between 60/40 and 40/60.
5. Repeat steps 3 and 4 with the Signal Generator frequency set to 2.253 MHz.
TRANSMIT
PDH
BINARY
TRANSMIT
PDH
MAIN
SETTINGS
TRANSMIT
PDH
BINARY
Summary of Contents for 37717C
Page 2: ...HP 37717C Communications Performance Analyzer Calibration Manual ...
Page 5: ...2 ...
Page 21: ...xviii Contents ...
Page 109: ...2 20 Installation Additional Precautions for Service Engineers ...
Page 312: ...3 203 Performance Tests Trigger Output Option UKZ Figure 3 57 Monitor Input Test Setup ...
Page 375: ...3 266 Performance Tests Performance Test Record ...
Page 379: ...4 4 Installation Current Previous Terminology ...
Page 392: ...B 9 Appendix B Fitting Calibrating Testing New Modules Typical Jitter Transmit Spectrum ...
Page 393: ...B 10 Appendix B Fitting Calibrating Testing New Modules ...