Section 9 Interrupt Controller (INTC)
Rev. 1.00 Oct. 01, 2007 Page 302 of 1956
REJ09B0256-0100
Interrupt Source
INTEVT
Code
Interrupt
Priority
MASK/CLEAR
Register
Interrupt
Source
Register
Detail
Source
Register
Priority
in the
Source
Default
Priority
PCIERR H'AA0
INT2B4[5]
High
PCIPWD3 H'AC0
INT2B4[6]
PCIPWD2 H'AE0
INT2B4[7]
PCIPWD1 H'B00
INT2B4[8]
High
PCIC5
PCIPWD0 H'B20
INT2PRI5
[4:0]
INT2MSKR[19]
INT2MSKCR[19]
INT2A0[19]
INT2A1[19]
INT2B4[9]
Low
STIF0 STIFI0
H'B40
INT2PRI
13[4:0]
INT2MSKR1[20]
INT2MSKCR1[20]
INT2A01[20]
INT2A11[20]
—
STIF1 STIFI1
H'B60
INT2PRI
13[12:8]
INT2MSKR1[21]
INT2MSKCR1[21]
INT2A01[21]
INT2A11[21]
—
SCIF1
ERI1
*
1
H'B80
INT2B2[4]
RXI1
*
1
H'BA0
INT2B2[5]
BRI1
*
1
H'BC0
INT2B2[6]
TXI1
*
1
H'BE0
INT2PRI2
[20:16]
INT2MSKR[4]
INT2MSKCR[4]
INT2A0[4]
INT2A1[4]
INT2B2[7]
High
Low
SIOF0 SIOFI0
H'C00
INT2PRI6
[28:24]
INT2MSKR[14]
INT2MSKCR[14]
INT2A0[14]
INT2A1[14]
—
SIOF1 SIOFI1
H'C20
INT2PRI1
0[4:0]
INT2MSKR1[8]
INT2MSKCR1[8]
INT2A01[8]
INT2A11[8]
—
SIOF2 SIOFI2
H'C40
INT2PRI1
0[12:8]
INT2MSKR1[9]
INT2MSKCR1[9]
INT2A01[9]
INT2A11[9]
—
USBH USBHI
H'C60
INT2PRI1
2[12:8]
INT2MSKR1[17]
INT2MSKCR1
[17]
INT2A01
[17]
INT2A11
[17]
—
USBFI0 H'C80
INT2B10
[0]
USBF
USBFI1 H'CA0
INT2PRI6
[20:16]
INT2MSKR1[24]
INT2MSKCR1
[24]
INT2A01
[24]
INT2A11
[24]
INT2B10
[1]
Low
Содержание SH7763
Страница 2: ...Rev 1 00 Oct 01 2007 Page ii of lxvi ...
Страница 122: ...Section 2 Programming Model Rev 1 00 Oct 01 2007 Page 56 of 1956 REJ09B0256 0100 ...
Страница 144: ...Section 3 Instruction Set Rev 1 00 Oct 01 2007 Page 78 of 1956 REJ09B0256 0100 ...
Страница 170: ...Section 4 Pipelining Rev 1 00 Oct 01 2007 Page 104 of 1956 REJ09B0256 0100 ...
Страница 282: ...Section 7 Caches Rev 1 00 Oct 01 2007 Page 216 of 1956 REJ09B0256 0100 ...
Страница 378: ...Section 9 Interrupt Controller INTC Rev 1 00 Oct 01 2007 Page 312 of 1956 REJ09B0256 0100 ...
Страница 514: ...Section 12 DDR SDRAM Interface DDRIF Rev 1 00 Oct 01 2007 Page 448 of 1956 REJ09B0256 0100 ...
Страница 630: ...Section 13 PCI Controller PCIC Rev 1 00 Oct 01 2007 Page 564 of 1956 REJ09B0256 0100 ...
Страница 686: ...Section 14 Direct Memory Access Controller DMAC Rev 1 00 Oct 01 2007 Page 620 of 1956 REJ09B0256 0100 ...
Страница 710: ...Section 16 Clock Pulse Generator CPG Rev 1 00 Oct 01 2007 Page 644 of 1956 REJ09B0256 0100 ...
Страница 732: ...Section 17 Watchdog Timer and Reset WDT Rev 1 00 Oct 01 2007 Page 666 of 1956 REJ09B0256 0100 ...
Страница 752: ...Section 18 Power Down Mode Rev 1 00 Oct 01 2007 Page 686 of 1956 REJ09B0256 0100 ...
Страница 772: ...Section 19 Timer Unit TMU Rev 1 00 Oct 01 2007 Page 706 of 1956 REJ09B0256 0100 ...
Страница 824: ...Section 21 Compare Match Timer CMT Rev 1 00 Oct 01 2007 Page 758 of 1956 REJ09B0256 0100 ...
Страница 1060: ...Section 23 Gigabit Ethernet Controller GETHER Rev 1 00 Oct 01 2007 Page 994 of 1956 REJ09B0256 0100 ...
Страница 1062: ...Section 24 IP Security Accelerator SECURITY Rev 1 00 Oct 01 2007 Page 996 of 1956 REJ09B0256 0100 ...
Страница 1124: ...Section 26 I 2 C Bus Interface IIC Rev 1 00 Oct 01 2007 Page 1058 of 1956 REJ09B0256 0100 ...
Страница 1184: ...Section 27 Serial Communication Interface with FIFO SCIF Rev 1 00 Oct 01 2007 Page 1118 of 1956 REJ09B0256 0100 ...
Страница 1350: ...Section 30 SIM Card Module SIM Rev 1 00 Oct 01 2007 Page 1284 of 1956 REJ09B0256 0100 ...
Страница 1484: ...Section 33 Audio Codec Interface HAC Rev 1 00 Oct 01 2007 Page 1418 of 1956 REJ09B0256 0100 ...
Страница 1560: ...Section 35 USB Host Controller USBH Rev 1 00 Oct 01 2007 Page 1494 of 1956 REJ09B0256 0100 ...
Страница 1720: ...Section 37 LCD Controller LCDC Rev 1 00 Oct 01 2007 Page 1654 of 1956 REJ09B0256 0100 ...
Страница 2025: ......
Страница 2026: ...SH7763 Hardware Manual ...