Section 9 Interrupt Controller (INTC)
Rev. 1.00 Oct. 01, 2007 Page 289 of 1956
REJ09B0256-0100
INT2B11:
Indicates detailed interrupt sources for the SIM.
Module Bit Source
Function
Description
31 to 4
—
These bits are always read as 0. The
write value should always be 0.
3
TEND
Transmit end interrupt
2
TXI
Transmit data empty interrupt
1
RXI
Receive data full interrupt
SIM
0
ERI
Transmit/receive error interrupt
Indicates SIM interrupt
sources. This register
indicates the SIM
interrupt sources even
if mask setting is made
in the interrupt mask
register for them.
9.3.23
GPIO Interrupt Set Register (
INT2GPIC
)
INT2GPIC enables interrupt requests input from the following pins: PTB0 to PTB7 and PTM0 to
PTM7.
A GPIO interrupt is a low active and level-sense signal. Before enabling an interrupt request, set
the corresponding pin as an input with the corresponding port control register (PBCR, PMCR).
For the port control registers, see section 40, General Purpose I/O (GPIO).
16
17
18
19
20
21
22
23
24
25
26
27
28
29
31
30
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R
R
R
R
R/W
R/W
R/W
R/W
R
R
R
R
0
1
2
3
4
5
6
7
8
9
10
11
12
13
15
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R
R
R
R
R/W
R/W
R/W
R/W
R
R
R
R
PINT
15E
PINT
14E
PINT
13E
PINT
12E
PINT
11E
PINT
10E
PINT
9E
PINT
8E
PINT
7E
PINT
6E
PINT
5E
PINT
4E
PINT
3E
PINT
2E
PINT
1E
PINT
0E
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
−
− − −
−
− − −
−
− − −
−
− − −
Содержание SH7763
Страница 2: ...Rev 1 00 Oct 01 2007 Page ii of lxvi ...
Страница 122: ...Section 2 Programming Model Rev 1 00 Oct 01 2007 Page 56 of 1956 REJ09B0256 0100 ...
Страница 144: ...Section 3 Instruction Set Rev 1 00 Oct 01 2007 Page 78 of 1956 REJ09B0256 0100 ...
Страница 170: ...Section 4 Pipelining Rev 1 00 Oct 01 2007 Page 104 of 1956 REJ09B0256 0100 ...
Страница 282: ...Section 7 Caches Rev 1 00 Oct 01 2007 Page 216 of 1956 REJ09B0256 0100 ...
Страница 378: ...Section 9 Interrupt Controller INTC Rev 1 00 Oct 01 2007 Page 312 of 1956 REJ09B0256 0100 ...
Страница 514: ...Section 12 DDR SDRAM Interface DDRIF Rev 1 00 Oct 01 2007 Page 448 of 1956 REJ09B0256 0100 ...
Страница 630: ...Section 13 PCI Controller PCIC Rev 1 00 Oct 01 2007 Page 564 of 1956 REJ09B0256 0100 ...
Страница 686: ...Section 14 Direct Memory Access Controller DMAC Rev 1 00 Oct 01 2007 Page 620 of 1956 REJ09B0256 0100 ...
Страница 710: ...Section 16 Clock Pulse Generator CPG Rev 1 00 Oct 01 2007 Page 644 of 1956 REJ09B0256 0100 ...
Страница 732: ...Section 17 Watchdog Timer and Reset WDT Rev 1 00 Oct 01 2007 Page 666 of 1956 REJ09B0256 0100 ...
Страница 752: ...Section 18 Power Down Mode Rev 1 00 Oct 01 2007 Page 686 of 1956 REJ09B0256 0100 ...
Страница 772: ...Section 19 Timer Unit TMU Rev 1 00 Oct 01 2007 Page 706 of 1956 REJ09B0256 0100 ...
Страница 824: ...Section 21 Compare Match Timer CMT Rev 1 00 Oct 01 2007 Page 758 of 1956 REJ09B0256 0100 ...
Страница 1060: ...Section 23 Gigabit Ethernet Controller GETHER Rev 1 00 Oct 01 2007 Page 994 of 1956 REJ09B0256 0100 ...
Страница 1062: ...Section 24 IP Security Accelerator SECURITY Rev 1 00 Oct 01 2007 Page 996 of 1956 REJ09B0256 0100 ...
Страница 1124: ...Section 26 I 2 C Bus Interface IIC Rev 1 00 Oct 01 2007 Page 1058 of 1956 REJ09B0256 0100 ...
Страница 1184: ...Section 27 Serial Communication Interface with FIFO SCIF Rev 1 00 Oct 01 2007 Page 1118 of 1956 REJ09B0256 0100 ...
Страница 1350: ...Section 30 SIM Card Module SIM Rev 1 00 Oct 01 2007 Page 1284 of 1956 REJ09B0256 0100 ...
Страница 1484: ...Section 33 Audio Codec Interface HAC Rev 1 00 Oct 01 2007 Page 1418 of 1956 REJ09B0256 0100 ...
Страница 1560: ...Section 35 USB Host Controller USBH Rev 1 00 Oct 01 2007 Page 1494 of 1956 REJ09B0256 0100 ...
Страница 1720: ...Section 37 LCD Controller LCDC Rev 1 00 Oct 01 2007 Page 1654 of 1956 REJ09B0256 0100 ...
Страница 2025: ......
Страница 2026: ...SH7763 Hardware Manual ...