2.3 Overview of Function Code
C
hap.
2
FUN
CT
IO
N
C
O
D
E
S
■
Block diagram
Operation
block
Input 1
Input 2
Step 3
SO003
Terminal
command
Operation
block
Input 1
Step 4
SO004
Input 2
Operation
block
Input 1
Step 5
SO005
Input 2
(U73)
(U74)
Operation
block
Input 1
Step 200
SO200
Input 2
(U80)
CLO3(U83)
CLO4(U84)
CLO10
(U90)
Inverter
Sequence
processor
SS1
SS2
SS4
SS8
BX
RST
TB1
TB2
UNBL
FWD
RUN
FAR
FDT
TRY
SW52-2
SW52-3
BRKS
ID
FRUN
Internal input signal
Internal output signal
X1
X2
X3
X4
X5
X6
X7
Digital input
(X terminal)
Digital output
(Y terminal)
Y1
Y2
Y3A/C
Customizable
logic
Output signal
Customizable logic
Disable
0
1
2
200
SO001
SO002
SO200
CLO1
*1
(U71)
Disable
0
1
2
200
SO001
SO002
SO200
CLO3
*2
(U73)
3
SO003
4
SO004
Inverter
Application
Process
FSET(NP)
FSET(P)
FOUT1
FOUT2
IOUT
VOUT
Internal input
signal
Internal output
signal
12
C1
V2
Analog input
(12, C1, V2
terminals)
Analog output
(FMA terminals)
FMA
(U02)
(U03)
Input 1
Input 2
Step 1
SO001
Output
signal
Operation
block
Input 1
SO002
Input 2
*1
(U71)
(U72)
CLO1(U81)
CLO2(U82)
*2
Operation block
(U01, U04,
U05)
X8
FWD
REV
Y4A/C
Y5A/C
30A/B/C
T-BIAS
Mode selection function codes for enabling customizable logic can be modified during
operation but the customizable logic output may become temporarily unstable due to the
setting modification. Therefore, since unexpected operation can be performed, change the
settings if possible when the inverter is stopped.
A physical injury may result.
A damage may result.
2-109
Содержание Frenic lift
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