BAT32G1x9 user manual | Chapter 19 Universal serial communication unit
576 / 1149
Rev.1.02
19.3.2
Serial clock selection register m (SPSm).
The SPSm register is a 16-bit register that selects two common operating clocks (CKm0, CKm1)
available to each channel. Select CKm1 by bit7 to 4 of the SPSm register and select from bit3 to 0 CKm0
。
It is forbidden to overwrite the SPSm register during operation (SEmn=1).
The SPSm register is set by means of a 16-bit memory operation instruction.
I can set the low 8 bits of the SPSm register with SPSmL and through the 8-bit memory operation
instruction.
After generating a reset signal, the value of the SPSm register changes to "0000H".
Figure 19-5
Format of the serial clock selection register m (SPSm).
After reset: 0000H
R/W
Symbol 15
14
13
12
11
10
9 8 7 6 5 4 3 2 1 0
SPSm
PRSmk3
PRSmk2
PRSmk1
PRSmk0
Select
note
for the running clock
(CKmk).
0
0
0
0
f
CLK
0
0
0
1
f
CLK
/2
0
0
1
0
f
CLK
/2
2
0
0
1
1
f
CLK
/2
3
0
1
0
0
f
CLK
/2
4
0
1
0
1
f
CLK
/2
5
0
1
1
0
f
CLK
/2
6
0
1
1
1
f
CLK
/2
7
1
0
0
0
f
CLK
/2
8
1
0
0
1
f
CLK
/2
9
1
0
1
0
f
CLK
/2
10
1
0
1
1
f
CLK
/2
11
1
1
0
0
f
CLK
/2
12
1
1
0
1
f
CLK
/2
13
1
1
1
0
f
CLK
/2
14
1
1
1
1
f
CLK
/2
15
Note When you change the clock selected as
f
CLK
(change the value of the system clock control register (CKC
))during
the operation of the Universal Serial Communication Unit (
SCI), you must stop
the operation of the SCI
(serial channel stop register
m). (STm)=000FH) after making changes.
Note that bit15~8
must be
set to
"0".
Note 1.f
CLK
:
Cpu/peripheral hardware clock frequency
2.m: Unit number (m=0~2).
3.k=0, 1
0
0
0
0
0
0
0
0
PRS
m13
PRS
m12
PRS
m11
PRS
m10
PRS
m03
PRS
m02
PRS
m01
PRS
m00
