Cmsemicon BAT32G1 9 Series, Руководство пользователя

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BAT32G1x9 user manual | Chapter 22 CAN control
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960 / 1149 Rev.1.02
Figure 22-63. Packet cache initialization
Note: 1. The RDY bit must be cleared before initializing the packet cache
2. Refer to the settings below for unused packet caching
- Clear the RDY, TRQ and DN bits of the CnMCTRLm register to 0
- Clear the MA0 bit of the CnMCONFm register to 0
Clear RDY bit
Set the C0MCONFm register
Set the C0MeDHm register,
C0MeDlm register
Clear the C0MDBm register
Set the C0MCTRLm register
Set the RDY bit
Begin
no
t
RDY= 1?
yes
no
t
RDY= 0?
yes
no
t
Send message cache?
yes
Set the C0MDLCm
register
end