BAT32G1x9 user manual | Chapter 20 Serial interface IICA
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Rev.1.02
20.4 The functionality of
I2
C-bus mode
20.4.1
Pin structure
The serial clock pin (SCLAn) and serial data bus pin (SDAAn) are structured as follows.
1)
SCLAn...... Input/output pins of the serial clock
The outputs of both the master and slave devices are N-channel open-drain outputs, and the inputs are
Schmidt inputs.
2)
SDAAn...... Input/output multiplexing pins for serial data
The outputs of both the master and slave devices are N-channel open-drain outputs, and the inputs are
Schmidt inputs.
Because the outputs of the serial clock line and serial data bus are N-channel open-drain outputs, an
external pull-up resistor is required.
Figure 20-11
Pin Structure Diagram
master control device
clock
output
(clock
input)
Data output
Data input
Data output
Data input
(clock output)
clock input
slave device
SCLAn
SDAAn
SCLAn
SDAAn
V
DD
V
SS
V
SS
V
SS
V
SS
V
DD
Note: n=0,1
