282
Chapter 7
16-Bit Timer/Event Counter P
User’s Manual U16702EE3V2UD00
Figure 7-21:
Flowchart of Basic Operation in External Trigger Pulse Output Mode
Note:
The 16-bit counter is not cleared upon a match between the 16-bit counter and the CCR1 buffer
register.
Remark:
n = 0 to 3
START
Initial settings
INTTPnCC0 output
• Clock selection
(TPnCTL0: TPnCKS2 to TPnCKS0)
• External trigger pulse output mode
setting
(TPnCTL1: TPnMD2 to TPnMD0 = 010)
• Compare register setting
(TPnCCR0, TPnCCR1)
Timer operation enable (TPnCE = 1)
→
Transfer of TPnCCR0, TPnCCR1
values to CCR0 buffer register
and CCR1 buffer register
Match between 16-bit counter and
TPnCCR1
Note
INTTPnCC1 output
Match between 16-bit counter and
TPnCCR0,16-bit counter clear & start
External trigger
(TIPn0 pin) input
External trigger (TIPn0 pin) input
→
16-bit counter start
16-bit counter
clear & start
electronic components distributor