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Chapter 16
FCAN Controller
User’s Manual U16702EE3V2UD00
16.7 Bit
Set/Clear
Function
The CAN control registers include registers whose bits can be set or cleared via the CPU and via the
CAN interface. An operation error occurs if the following registers are written directly. Do not write any
values directly via bit manipulation, read/modify/write, or direct writing of target values.
•
CAN global control register (CnGMCTRL)
•
CAN global automatic block transmission control register (CnGMABT)
•
CAN module control register (CnCTRL)
•
CAN module interrupt enable register (CnIE)
•
CAN module interrupt status register (CnINTS)
•
CAN module receive history list register (CnRGPT)
•
CAN module transmit history list register (CnTGPT)
•
CAN module time stamp register (CnTS)
•
CAN message control register (CnMCTRLm)
Remark:
n = 0, 1
m = 0 to 31
All the 16 bits in the above registers can be read via the usual method. Use the procedure described in
Figure 16-47 below to set or clear the lower 8 bits in these registers.
Setting or clearing of lower 8 bits in the above registers is performed in combination with the higher 8
bits (refer to the bit status after set/clear operation is specified in Figure 16-48). Figure 16-47 shows
how the values of set bits or clear bits relate to set/clear/no change operations in the corresponding
register.
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