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Chapter 3
CPU Function
User’s Manual U16702EE3V2UD00
3.4.5 Memory
areas
(1)
Internal ROM area
(a) Memory map
1 MB of addresses 0000000H to 00FFFFFH is reserved as the internal ROM area.
• µPD70F3402
128 KB are provided in the following addresses as physical internal ROM (flash memory).
In single-chip mode: Addresses 000000H to 01FFFFH
• µPD70F3403 and µPD70F3403A
256 KB are provided in the following addresses as physical internal ROM (flash memory).
In single-chip mode: Addresses 000000H to 03FFFFH
Figure 3-19:
Internal ROM Area
(b) Interrupt/exception table
The V850E/RS1 speeds up the interrupt response time by fixing handler addresses corresponding
to interrupts/exceptions.
A collection of these handler addresses is called an interrupt/exception table, which is mapped to
the internal ROM area. When an interrupt/exception is acknowledged, execution jumps to a han-
dler address and the program in the area starting from that address is executed.
Refer to
Chapter 17
”Interrupt/Exception Processing Function” on page 685
for a descrip-
tion of the interrupt/exception sources and corresponding addresses.
Internal ROM area
(128 KB)
0002 0000H
0001 FFFFH
0000 0000H
00F FFFFH
µPD70F3402
Access-prohibited
area
Internal ROM area
(256 KB)
0004 0000H
0003 FFFFH
0000 0000H
000F FFFFH
µPD70F3403 and µPD70F3403A
Access-prohibited
area
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