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Chapter 10
Functions of Watchdog Timer 2
User’s Manual U16702EE3V2UD00
(3)
Watchdog timer enable register (WDTE)
The counter of the Watchdog timer is cleared and counting restarted by writing “ACH” to WDTE.
WDTE is set by an 8-bit memory manipulation instruction.
RESET Input sets this register to 9AH.
Figure 10-4:
Watchdog Timer Enable Register (WDTE) Format
Note:
Once RUN2 is set to 1 it cannot be cleared to 0 by software. Therefore, counting can be
stopped only by RESET input after counting is started.
Cautions: 1. When a value other than “ACH” is written to the WDTE register, an overflow
signal is forcibly output when “RUN2” bit was previously set to 1.
2. When an 1-bit memory manipulation instruction is executed for the WDTE
register, an overflow signal is forcibly output (an error results in the assembler).
3. The read value of the WDTE register is “9AH” (which differs from written value
“ACH”).
Symbol
7
6
5
4
3
2
1
0
Address
After reset
WDTE
RUN2
FFFFF6D1H
9AH
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RUN2
RUN2 Selection of Watchdog timer operation mode
Note
0
Counting stopped
1
Counter cleared and counting started
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