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Chapter 16
FCAN Controller
User’s Manual U16702EE3V2UD00
16.2.5 Overload
frame
An overload frame is transmitted under the following conditions.
•
When the receiving node has not completed the reception operation
•
If a dominant level is detected at the first two bits during intermission
•
If a dominant level is detected at the last bit (7th bit) of the end of frame or at the last bit (8th bit)
of the error delimiter/overload delimiter
Note:
In this CAN controller, all reception frames can be loaded without outputting an overload frame
because of the high-speed internal processing.
Figure 16-16:
Overload Frame
Remark:
D: Dominant = 0
R: Recessive = 1
Node n
¼
node m
Table 16-8:
Definition of Overload Frame Fields
No
Name
Bit Count
Definition
<1>
Overload flag
6
Outputs 6 dominant-level bits consecutively.
<2>
Overload flag from
other node
0 to 6
The node that received an overload flag in the interframe space outputs
an overload flag.
<3>
Overload delimiter
8
Outputs 8 recessive-level bits consecutively.
If a dominant level is detected at the 8th bit, an overload frame is trans-
mitted from the next bit.
<4>
Frame
–
Output following an end of frame, error delimiter, or overload delimiter.
<5>
Interframe space/
overload frame
–
An interframe space or overload frame starts from here.
<1>
R
D
<2>
<3>
6 bits
0 to 6 bits
8 bits
(<4>)
(<5>)
Interframe space or overload frame
Overload delimiter
Overload flag (node n)
Overload flag (node m)
Frame
Overload frame
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