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Chapter 22
On-Chip Debug Function
User’s Manual U16702EE3V2UD00
22.6 Restrictions and Cautions on On-Chip Debug Function
•
Do not mount a device that was used for debugging on a mass-produced product (this is
because the flash memory was rewritten during debugging and the number of rewrites of the
flash memory cannot be guaranteed).
•
If a reset signal (reset input from the target system or reset by an internal reset source) is input
during RUN (program execution), the break function may malfunction.
•
Even if reset is masked by using a mask function, the I/O buffer (port pin, etc.) is reset when a
pin reset signal is input.
•
With a debugger that can set software breakpoints in the internal flash memory, the breakpoints
temporarily become invalid when pin reset or internal reset is effected. The breakpoints become
valid again if a break such as a hardware break or forced break is executed. Until then, no
software break occurs.
•
The RESET signal input is masked during a break.
•
The POC reset operation cannot be emulated.
•
Pin reset must be input to execute on-chip debugging, because the OCDM0 bit of the OCDM
register must be set to 1.
•
For details, refer to 22.3 (1)”On-chip debug mode register (OCDM)” on page 771.
Caution:
Caution for useful
When break command is based, and application software accesses for UARTA/CSIB/AFCAN
peripheral I/O register, to restart without reset, CSIB and AFCAN that may be not correct
operation.
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