Chapter 21 Electrical Characteristics
21-9
21.5.5 PCI Interface AC characteristics (66 MHz)
(Tc
= 0 – 70
°
C, V
CCIO
= 3.3 V
±
0.2 V, V
CCInt
= 1.5 V
±
0.1 V, V
SS
= 0 V)
Item Symbol
Conditions
Min.
Max.
Unit
PCICLKIN Cycle Time (66 MHz)
t
CYC66
15 30 ns
PCICLKIN High Time (66 MHz)
t
HIGH66
6
⎯
ns
PCICLKIN Low Time (66 MHz)
t
LOW66
6
⎯
ns
PCICLKIN Slew Rate (66 MHz)
t
SLEW66
1.5
4
V/ns
PCICLK[5:0] Cycle Time (66 MHz)
t
CYCO66
C
L
=50
pF
15 30 ns
PCICLK[5:0] High Time (66 MHz)
t
HIGHO66
C
L
=50 pF
6
⎯
ns
PCICLK[5:0] Low Time (66 MHz)
t
LOWO66
C
L
=50 pF
6
⎯
ns
PCICLK[5:0] Skew (66 MHz)
t
SKEW
C
L
=50 pF, point to point connect
0
1 ns
PCI Output Signal
*
1)
Output Delay
t
VAL66
C
L
=30 pF
2
8 ns
PCI Input Signal
*
2)
Input Setup Time
t
SU66
3
⎯
ns
PCI Input Signal
*
2)
Input Hold Time
t
HO66
0.5
⎯
ns
ID_SEL, REQ[0]
*
, GNT[3:0]
*
Output Delay
t
VALPP66
C
L
=30 pF, point-to-point connect
2
8
ns
ID_SEL, REQ[3:0]
*
, GNT[0]
*
Input Setup Time
t
SUPP66
Point-to-point connection
5
⎯
ns
ID_SEL, REQ[3:0]
*
, GNT[0]
*
Input Hold Time
t
HOPP66
Point-to-point connection
0
⎯
ns
*
1) PCIAD[31:0], C_BE[3:0], PAR, FRAME
*
, IRDY
*
, TRDY
*
, STOP
*
, DEVSEL
*
, PERR
*
, SERR
*
,
M66EN, and PME
*
*
2) PCIAD[31:0] , C_BE[3:0] , PAR, FRAME
*
, IRDY
*
, TRDY
*
, STOP
*
, DEVSEL
*
, PERR
*
, SERR
*
,
M66EN, PME
*
, LOCK
*
, and ID_SEL
21.5.6 PCI Interface AC characteristics (33 MHz)
(Tc
= 0 – 70
°
C, V
CCIO
= 3.3 V
±
0.2 V, V
CCInt
= 1.5 V
±
0.1 V, V
SS
= 0 V)
Item Symbol
Condition
Min.
Max.
Unit
PCICLKIN Cycle Time (33 MHz)
t
CYC33
30
40
ns
PCICLKIN High Time (33 MHz)
t
HIGH33
11
⎯
ns
PCICLKIN Low Time (33 MHz)
t
LOW33
11
⎯
ns
PCICLKIN Slew Rate (33 MHz)
t
SLEW33
1
4
V/ns
PCICLK[5:0] Cycle Time (33 MHz)
t
CYC33
C
L
=70 pF
30
40
ns
PCICLK[5:0] High Time (33 MHz)
t
HIGH33
C
L
=70 pF
11
⎯
ns
PCICLK[5:0] Low Time (33 MHz)
t
LOW33
C
L
=70 pF
11
⎯
ns
PCICLK[5:0] Skew (33 MHz)
t
SKEW
C
L
=70 pF, point to point connect
0
2
ns
PCI Output Signal
*
1)
Output Delay
t
VAL33
C
L
=70 pF
2
11
ns
PCI Input Signal
*
2)
Input Setup Time
t
SU33
7
⎯
ns
PCI Input Signal
*
2)
Input Hold Time
t
HO33
0.5
⎯
ns
ID_SEL, REQ[0]
*
, GNT[3:0]
*
Output Delay
t
VALPP33
C
L
=70 pF, point to point connect
2
12
ns
ID_SEL, REQ[3:0]
*
, GNT[0]
*
Input Setup Time
t
SUPP33
point to point connct
10
⎯
ns
ID_SEL, REQ[3:0]
*
, GNT[0]
*
Input Hold Time
t
HOPP33
point to point connect
0
⎯
ns
*
1) PCIAD[31:0], C_BE[3:0] , PAR, FRAME
*
, IRDY
*
, TRDY
*
, STOP
*
, DEVSEL
*
, PERR
*
, SERR
*
,
M66EN, and PME
*
*
2) PCIAD[31:0] , C_BE[3:0] , PAR, FRAME
*
, IRDY
*
, TRDY
*
, STOP
*
, DEVSEL
*
, PERR
*
, SERR
*
,
M66EN, PME
*
, LOCK
*
, and ID_SEL
Summary of Contents for TX49 TMPR4937
Page 1: ...64 Bit TX System RISC TX49 Family TMPR4937 Rev 2 0 ...
Page 4: ......
Page 13: ...Table of Contents ix TMPR4937 Revision History 1 ...
Page 14: ...Table of Contents x ...
Page 15: ...Handling Precautions ...
Page 16: ......
Page 18: ...1 Using Toshiba Semiconductors Safely 1 2 ...
Page 40: ...3 General Safety Precautions and Usage Considerations 3 18 ...
Page 42: ...4 Precautions and Usage Considerations 4 2 ...
Page 43: ...TMPR4937 2005 3 Rev 2 0 ...
Page 44: ......
Page 52: ...Chapter 1 Overview and Features 1 6 ...
Page 156: ...Chapter 7 External Bus Controller 7 56 ...
Page 491: ...Chapter 16 Removed 16 1 16 Removed ...
Page 492: ...Chapter 16 Removed 16 2 ...
Page 493: ...Chapter 17 Removed 17 1 17 Removed ...
Page 494: ...Chapter 17 Removed 17 2 ...
Page 495: ...Chapter 18 Removed 18 1 18 Removed ...
Page 496: ...Chapter 18 Removed 18 2 ...
Page 497: ...Chapter 19 Removed 19 1 19 Removed ...
Page 498: ...Chapter 19 Removed 19 2 ...
Page 506: ...Chapter 20 Extended EJTAG Interface 20 8 ...
Page 530: ...Chapter 22 Pinout and Package Information 22 10 ...
Page 542: ...Chapter 24 Parts Number when Ordering 24 2 ...