Chapter 13 Parallel I/O Port
13-2
13.3 Detailed Description
13.3.1 Selecting PIO Pins
Of the 16-bit PIO signals, signals PIO[15:8] can be used in combination with 8-bit ECC check bit
signals. The configuration signal (ADDR[18]) at boot up determines which function will be used. See
3.3 Configuration Signals for more information.
13.3.2 General-purpose Parallel Port
The four following registers are used to control the PIO port.
•
PIO Output Data Register (PIODO)
•
PIO Input Data Register (PIODI)
•
PIO Direction Control Register (PIODIR)
•
PIO Open Drain Control Register (PIOOD)
PIO signals can be selected by the PIO Direction Control Register (PIODIR) for each bit as either
input or output.
Signals selected as output signals output the values written into the PIO Data Output Register
(PIODO). The PIO Open Drain Control Register (PIOOD) can select whether each bit is either an open
drain output or a totem pole output.
PIO signal status is indicated by the PIO Data Input Register. This register can be read out at any time
regardless of the pin direction settings.
13.4 Registers
Table 13.4.1 PIO Register Map
Offset Address
Mnemonic
Register Name
0xF500
PIODO
Output Data Register
0xF504
PIODI
Input Data Register
0xF508
PIODIR
Direction Control Register
0xF50C
PIOOD
Open Drain Control Register
Summary of Contents for TX49 TMPR4937
Page 1: ...64 Bit TX System RISC TX49 Family TMPR4937 Rev 2 0 ...
Page 4: ......
Page 13: ...Table of Contents ix TMPR4937 Revision History 1 ...
Page 14: ...Table of Contents x ...
Page 15: ...Handling Precautions ...
Page 16: ......
Page 18: ...1 Using Toshiba Semiconductors Safely 1 2 ...
Page 40: ...3 General Safety Precautions and Usage Considerations 3 18 ...
Page 42: ...4 Precautions and Usage Considerations 4 2 ...
Page 43: ...TMPR4937 2005 3 Rev 2 0 ...
Page 44: ......
Page 52: ...Chapter 1 Overview and Features 1 6 ...
Page 156: ...Chapter 7 External Bus Controller 7 56 ...
Page 491: ...Chapter 16 Removed 16 1 16 Removed ...
Page 492: ...Chapter 16 Removed 16 2 ...
Page 493: ...Chapter 17 Removed 17 1 17 Removed ...
Page 494: ...Chapter 17 Removed 17 2 ...
Page 495: ...Chapter 18 Removed 18 1 18 Removed ...
Page 496: ...Chapter 18 Removed 18 2 ...
Page 497: ...Chapter 19 Removed 19 1 19 Removed ...
Page 498: ...Chapter 19 Removed 19 2 ...
Page 506: ...Chapter 20 Extended EJTAG Interface 20 8 ...
Page 530: ...Chapter 22 Pinout and Package Information 22 10 ...
Page 542: ...Chapter 24 Parts Number when Ordering 24 2 ...