NXP Semiconductors LPC43Sxx, User Manual

Page: 1020 / 1441

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2015. All rights reserved.
User manual Rev. 2.1 — 10 December 2015 1020 of 1441
NXP Semiconductors
UM10503
Chapter 32: LPC43xx/LPC43Sxx Timer0/1/2/3
MAT2 T0_MAT2 - - -
CTOUT_2 if
match ORed with
SCT output - - 0
- Event router input 13 no -
MAT3 T0_MAT3 - - -
CTOUT_3 if
match ORed with
SCT output - - 0
Table 783. Timer1 inputs and outputs
Input/output From/to
multiplexed pin
function
From/to internal signal Default (see
GIMA,
Table 208 )
CTOUTCTRL
bit (see
Table 105 )
Timer1 inputs
CAP0 CTIN_0 - yes -
- SGPIO12 no -
T1_CAP0 - no -
CAP1 CTIN_3 - yes -
T1_CAP1 - no -
- USART0 TX active no -
CAP2 CTIN_4 - yes -
T1_CAP2 - no -
CAP3 - USART0 RX active no -
- SCT output 3 OR T0 match
channel 3 yes 0
- SCT output 3 yes 1
- T0 match channel 3 no -
T1_CAP3 - no -
Timer1 outputs
MAT0 T1_MAT0 - - -
MAT1 T1_MAT1 - - -
MAT2 T1_MAT2 - - -
CTOUT_6 if
match ORed with
SCT output 0
- Event router input 14 no -
MAT3 T1_MAT3 - - -
CTOUT_7 if
match ORed with
SCT output - - 0
Table 782. Timer0 inputs and outputs
…continued
Input/output From/to
multiplexed pin
function
From/to internal signal Default (see
GIMA,
Table 208 )
CTOUTCTRL
bit (see
Table 105 )