UM10503
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© NXP B.V. 2015. All rights reserved.
User manual
Rev. 2.1 — 10 December 2015
670 of 1441
NXP Semiconductors
UM10503
Chapter 25: LPC43xx/LPC43Sxx USB0 Host/Device/OTG controller
25.6.15.2 Host mode
The host controller uses one port. The register is only reset when power is initially applied
or in response to a controller reset. The initial conditions of the port are:
•
No device connected
•
Port disabled
If the port has power control, this state remains until software applies power to the port by
setting port power to one in the PORTSC register.
Table 490. Port Status and Control register in host mode (PORTSC1_H - address 0x4000 6184) bit description
Bit
Symbol
Value
Description
Reset
value
Access
0
CCS
Current connect status
This value reflects the current state of the port and may not correspond
directly to the event that caused the CSC bit to be set.
This bit is 0 if PP (Port Power bit) is 0.
Software clears this bit by writing a 1 to it.
0
R/WC
0
No device is present.
1
Device is present on the port.
1
CSC
Connect status change
Indicates a change has occurred in the port’s Current Connect Status. The
host/device controller sets this bit for all changes to the port device connect
status, even if system software has not cleared an existing connect status
change. For example, the insertion status changes twice before system
software has cleared the changed condition, hub hardware will be setting
an already-set bit (i.e., the bit will remain set). Software clears this bit by
writing a one to it.
This bit is 0 if PP (Port Power bit) is 0
0
R/WC
0
No change in current status.
1
Change in current status.
2
PE
Port enable.
Ports can only be enabled by the host controller as a part of the reset and
enable. Software cannot enable a port by writing a one to this field. Ports
can be disabled by either a fault condition (disconnect event or other fault
condition) or by the host software. Note that the bit status does not change
until the port state actually changes. There may be a delay in disabling or
enabling a port due to other host controller and bus events.
When the port is disabled. downstream propagation of data is blocked
except for reset.
This bit is 0 if PP (Port Power bit) is 0.
0
R/W
0
Port disabled.
1
Port enabled.
