UM10503
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© NXP B.V. 2015. All rights reserved.
User manual
Rev. 2.1 — 10 December 2015
57 of 1441
NXP Semiconductors
UM10503
Chapter 5: LPC43xx Boot ROM
should be compiled with entry point at 0x0000 0000. On AES capable parts with a
programmed AES key, the image and header are authenticated using the CMAC
algorithm prior to copying to the internal SRAM. If authentication fails the device is reset.
On non-secure parts, the image and header are not authenticated. If the image is not
preceded by a header then the image is not copied to SRAM but assumed to be
executable as-is. In that case the shadow pointer is set to the first address location of the
external boot memory. The header-less images should be compiled with entry point at
0x0000 0000, the same as for an image with header.
Remark:
When the boot process fails, pin P1_1 toggles at a 1 Hz rate for 60 seconds.
After 60 seconds, the device is reset.
