NXP Semiconductors LPC43Sxx, User Manual

Page: 1386 / 1441

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2015. All rights reserved.
User manual Rev. 2.1 — 10 December 2015 1386 of 1441
NXP Semiconductors
UM10503
Chapter 52: LPC43xx/LPC43Sxx ARM Cortex M0/M4 reference
Load Word, immediate offset LDR Rd, [Rn, #<imm>] 2
Halfword, immediate offset LDRH Rd, [Rn, #<imm>] 2
Byte, immediate offset LDRB Rd, [Rn, #<imm>] 2
Word, register offset LDR Rd, [Rn, Rm] 2
Halfword, register offset LDRH Rd, [Rn, Rm] 2
Signed halfword, register offset LDRSH Rd, [Rn, Rm] 2
Byte, register offset LDRB Rd, [Rn, Rm] 2
Signed byte, register offset LDRSB Rd, [Rn, Rm] 2
PC-relative LDR Rd, <label> 2
SP-relative LDR Rd, [SP, #<imm>] 2
Multiple, excluding base LDM Rn!, {<loreglist>} 1 + N
[1]
Multiple, including base LDM Rn, {<loreglist>} 1 + N
[1]
Store Word, immediate offset STR Rd, [Rn, #<imm>] 2
Halfword, immediate offset STRH Rd, [Rn, #<imm>] 2
Byte, immediate offset STRB Rd, [Rn, #<imm>] 2
Word, register offset STR Rd, [Rn, Rm] 2
Halfword, register offset STRH Rd, [Rn, Rm] 2
Byte, register offset STRB Rd, [Rn, Rm] 2
SP-relative STR Rd, [SP, #<imm>] 2
Multiple STM Rn!, {<loreglist>} 1 + N
[1]
Push Push PUSH {<loreglist>} 1 + N
[1]
Push with link register PUSH {<loreglist>, LR} 1 + N
[1]
Pop Pop POP {<loreglist>} 1 + N
[1]
Pop and return POP {<loreglist>, PC} 4 + N
[2]
Branch Conditional B<cc> <label> 1 or 3
[3]
Unconditional B <label> 3
With link BL <label> 4
With exchange BX Rm 3
With link and exchange BLX Rm 3
Extend Signed halfword to word SXTH Rd, Rm 1
Signed byte to word SXTB Rd, Rm 1
Unsigned halfword UXTH Rd, Rm 1
Unsigned byte UXTB Rd, Rm 1
Reverse Bytes in word REV Rd, Rm 1
Bytes in both halfwords REV16 Rd, Rm 1
Signed bottom half word REVSH Rd, Rm 1
State change Supervisor Call SVC <imm> -
[4]
Disable interrupts CPSID i 1
Enable interrupts CPSIE i 1
Read special register MRS Rd, <specreg> 4
Write special register MSR <specreg>, Rn 4
Table 1177.Cortex M0- instruction set summary
Operation Description Assembler Cycles