NXP Semiconductors LPC43Sxx, User Manual

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User manual Rev. 2.1 — 10 December 2015 117 of 1441
NXP Semiconductors
UM10503
Chapter 9: LPC43xx/LPC43Sxx Nested Vectored Interrupt Controller
12 28 0x70 TIMER0 -
13 29 0x74 TIMER1 -
14 30 0x78 TIMER2 -
15 31 0x7C TIMER3 -
16 32 0x80 MCPWM Motor control PWM
17 33 0x84 ADC0 -
18 34 0x88 I2C0 -
19 35 0x8C I2C1 -
20 36 0x90 SPI -
21 37 0x94 ADC1 -
22 38 0x98 SSP0 -
23 39 0x9C SSP1 -
24 40 0xA0 USART0 -
25 41 0xA4 UART1 Combined UART interrupt with
Modem interrupt
26 42 0xA8 USART2 -
27 43 0xAC USART3 Combined USART interrupt with IrDA
interrupt
28 44 0xB0 I2S0 -
29 45 0xB4 I2S1 -
30 46 0xB8 SPIFI -
31 47 0xBC SGPIO -
32 48 0xC0 PIN_INT0 GPIO pin interrupt 0
33 49 0xC4 PIN_INT1 GPIO pin interrupt 1
34 50 0xC8 PIN_INT2 GPIO pin interrupt 2
35 51 0xCC PIN_INT3 GPIO pin interrupt 3
36 52 0xD0 PIN_INT4 GPIO pin interrupt 4
37 53 0xD4 PIN_INT5 GPIO pin interrupt 5
38 54 0xD8 PIN_INT6 GPIO pin interrupt 6
39 55 0xDC PIN_INT7 GPIO pin interrupt 7
40 56 0xE0 GINT0 GPIO global interrupt 0
41 57 0xE4 GINT1 GPIO global interrupt 1
42 58 0xE8 EVENTROUTER Event router interrupt
43 59 0xEC C_CAN1 -
44 60 0xF0 Reserved -
45 61 0xF4 ADCHS ADCHS combined interrupt
46 62 0xF8 ATIMER Alarm timer interrupt
47 63 0xFC RTC -
48 64 0x100 Reserved -
49 65 0x104 WWDT -
Table 78. Connection of interrupt sources to the Cortex-M4 NVIC
Interrupt
ID Exception
Number Vector
Offset Function Flags