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UM10503
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User manual
Rev. 2.1 — 10 December 2015
1242 of 1441
NXP Semiconductors
UM10503
Chapter 45: LPC43xx/LPC43Sxx C_CAN
45.6.1.4 CAN bit timing register
[1]
Hardware interprets the value programmed into these bits as the bit value
1.
Remark:
With a module clock CAN_CLK of 8 MHz, the reset value of 0x2301 configures
the C_CAN for a bit rate of 500 kBit/s. The registers are only writable if a configuration
change is enabled in CANCTRL and the controller is initialized by software (bits CCE and
INIT in the CAN Control Register are set).
45.6.1.5 CAN interrupt register
If several interrupts are pending, the CAN Interrupt Register will point to the pending
interrupt with the highest priority, disregarding their chronological order. An interrupt
remains pending until the CPU has cleared it. If INTID is different from 0x0000 and IE is
set, the interrupt line to the CPU is active. The interrupt line remains active until INTID is
back to value 0x0000 (the cause of the interrupt is reset) or until IE is reset.
The Status Interrupt has the highest priority. Among the message interrupts, the Message
Object’ s interrupt priority decreases with increasing message number.
A message interrupt is cleared by clearing the Message Object’s INTPND bit. The
StatusInterrupt is cleared by reading the Status Register.
Table 1039.CAN bit timing register (BT, address 0x400E 200C (C_CAN0) and 0x400A 400C
(C_CAN1)) bit description
Bit
Symbol
Description
Reset
value
Access
5:0
BRP
Baud rate prescaler
The value by which the oscillator frequency is divided
for generating the bit time quanta. The bit time is built up
from a multiple of this quanta. Valid values for the Baud
Rate Prescaler are 0 to 63
.
Valid programmed values are 0x01 - 0x3F
1
R/W
7:6
SJW
(Re)synchronization jump width
Valid programmed values are 0 to 3
.
0
R/w
11:8
TSEG1
Time segment before the sample point including
propagation time segment.
Valid values are 1 to 15
0011
R/W
14:12
TSEG2
Time segment after the sample point
Valid values are 0 to 7
.
010
R/W
31:15
-
Reserved
-
-
Table 1040.CAN interrupt register (INT, address 0x400E 2010 (C_CAN0) and 0x400A 4010
(C_CAN1)) bit description
Bit
Symbol
Description
Reset
value
Access
15:0
INTID15_0
0x0000 = No interrupt is pending
0x0001 to 0x0020 = Number of message object which
caused the interrupt.
0x0021 to 0x7FFF = Unused
0x8000 = Status interrupt
0x8001 to 0xFFFF = Unused
0
R
31:16
-
Reserved
-
-