NXP Semiconductors LPC43Sxx, User Manual

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UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2015. All rights reserved.
User manual Rev. 2.1 — 10 December 2015 257 of 1441
NXP Semiconductors
UM10503
Chapter 16: LPC43xx/LPC43Sxx Pin configuration
P2_5 K14 J12 D10 91
[3]
N;
PU I/O SGPIO14 — General purpose digital input/output pin.
I CTIN_2 — SCT input 2. Capture input 2 of timer 0.
I USB1_VBUS — Monitors the presence of USB1 bus power.
Note: This signal must be HIGH for USB reset to occur.
I ADCTRIG1 — ADC trigger input 1.
I/O GPIO5[5] — General purpose digital input/output pin.
- R — Function reserved.
O T3_MAT2 — Match output 2 of timer 3.
O USB0_IND0 — USB0 port indicator LED control output 0.
P2_6 K16 J14 G9 95
[2]
N;
PU I/O SGPIO7 — General purpose digital input/output pin.
I/O U0_DIR — RS-485/EIA-485 output enable/direction control for
USART0.
I/O EMC_A10 — External memory address line 10.
O USB0_IND0 — USB0 port indicator LED control
output 0.
I/O GPIO5[6] — General purpose digital input/output pin.
I CTIN_7 — SCT input 7.
I T3_CAP3 — Capture input 3 of timer 3.
- R — Function reserved.
P2_7 H14 G12 C10 96
[2]
N;
PU I/O GPIO0[7] — General purpose digital input/output pin. If this pin
is pulled LOW at reset, the part enters ISP mode using
USART0.
O CTOUT_1 — SCT output 1. Match output 3 of timer 3.
I/O U3_UCLK — Serial clock input/output for USART3 in
synchronous mode.
I/O EMC_A9 — External memory address line 9.
- R — Function reserved.
- R — Function reserved.
O T3_MAT3 — Match output 3 of timer 3.
- R — Function reserved.
Table 185. LPC4350/30/20/10 and LPC43S50/S30/S20 pin descriptions
…continued
LCD, Ethernet, USB0, and USB1 functions are not available on all parts.
Symbol
LB
GA25
6
TFBGA180 TFBGA100 LQ
FP1
44
R
e
se
t st
ate
[1
]
Ty
p
e
Description