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UM10503
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© NXP B.V. 2015. All rights reserved.
User manual
Rev. 2.1 — 10 December 2015
277 of 1441
NXP Semiconductors
UM10503
Chapter 16: LPC43xx/LPC43Sxx Pin configuration
P9_6
L11
M9
-
72
N;
PU
I/O
GPIO4[11] —
General purpose digital input/output pin.
O
MCOB1 —
Motor control PWM channel 1, output B.
I
USB1_PWR_FAULT —
USB1 Port power fault signal
indicating over-current condition; this signal monitors
over-current on the USB1 bus (external circuitry required to
detect over-current condition).
-
R —
Function reserved.
-
R —
Function reserved.
I
ENET_COL —
Ethernet Collision detect (MII interface).
I/O
SGPIO8 —
General purpose digital input/output pin.
I
U0_RXD —
Receiver input for USART0.
PA_0
L12
L10
-
-
N;
PU
-
R —
Function reserved.
-
R —
Function reserved.
-
R —
Function reserved.
-
R —
Function reserved.
-
R —
Function reserved.
O
I2S1_RX_MCLK —
I2S1 receive master clock.
O
CGU_OUT1 —
CGU spare clock output 1.
-
R —
Function reserved.
PA_1
J14
H12
-
-
N;
PU
I/O
GPIO4[8] —
General purpose digital input/output pin.
I
QEI_IDX —
Quadrature Encoder Interface INDEX input.
-
R —
Function reserved.
O
U2_TXD —
Transmitter output for USART2.
-
R —
Function reserved.
-
R —
Function reserved.
-
R —
Function reserved.
-
R —
Function reserved.
PA_2
K15
J13
-
-
N;
PU
I/O
GPIO4[9] —
General purpose digital input/output pin.
I
QEI_PHB —
Quadrature Encoder Interface PHB input.
-
R —
Function reserved.
I
U2_RXD —
Receiver input for USART2.
-
R —
Function reserved.
-
R —
Function reserved.
-
R —
Function reserved.
-
R —
Function reserved.
Table 185. LPC4350/30/20/10 and LPC43S50/S30/S20 pin descriptions
…continued
LCD, Ethernet, USB0, and USB1 functions are not available on all parts.
Symbol
LB
GA25
6
TFBGA180
TFBGA100
LQ
FP1
44
R
e
se
t st
ate
[1
]
Ty
p
e
Description