
Web GUI Control
1/1553-FGC 101 1790
Uen
Y
5-85
Media and FEC packets are transmitted on separate IP streams with the Column
FEC stream offset from media stream and have a UDP port number which is the
media port 2. The Row FEC stream is offset from Media stream and has
UDP port number which is the media port 4. This arrangement means that
non-enabled FEC receivers can simply ignore FEC streams and decode the media
packets.
The FEC data stream is off-set from the media stream to protect against burst error
loss and jitter. At the receiver, lost packets recovered using the FEC data packets.
The Column FEC protects against burst errors and the Row FEC protects against
random errors. ProMPEG FEC recovers lost packets using column and (optionally)
row FEC packets using the XOR function on the remaining packets. Depending on
the distribution and severity of the pack loss not all errors are recoverable.
Overhead
The overhead which results from ProMPEG FEC transmitting extra packets depends
on whether column or column and row FEC is selected and how many columns and
rows there are. (Note that L = number of columns, D = number of rows.)
Table 5.63 Column FEC
Overhead
(
L
+ (
D x
L
)) / (
D
x
L
) = 1 /
D
+ 1
Worst case
4 rows = 25%
Best case
20 rows = 5%
Table 5.64 Column and Row FEC
Overhead
(
L
+ (
D x
L
)) / (
D
x
L
) = 1 /
D
+ 1
Worst case
4 rows = 25%
Best case
20 rows = 5%
Block Alignment
FEC offers two methods of block alignment (also referred to as FEC linearisation)
for use when generating FEC packets: Non Block Aligned and Block Aligned. Both
are guaranteed of being able to correct L errors, sometimes more. The Block
Aligned method can however correct 2L+2 errors; this never happens with Non-
Block Aligned.
Non-Block Aligned can in theory have a lower latency at the decoder if it can be
guaranteed that the mode of operation will never change.
Block Aligned linearization is dealt with in Annex B of the ProMPEG Code of
Practice. In Block Aligned column FEC packets are sent every D’th frame and the L
Column FEC packets are played out every D slot. They are therefore evenly spread
over the D*L matrix period.
Summary of Contents for AVP 4000
Page 1: ...AVP Family AVP 4000 Software Version 9 31 x REFERENCE GUIDE 1 1553 FGC 101 1790 Uen Y ...
Page 10: ...Preliminary Pages x 1 1553 FGC 101 1790 Uen Y BLANK ...
Page 26: ...Introduction 1 16 1 1553 FGC 101 1790 Uen Y BLANK ...
Page 42: ...Getting Started 3 6 1 1553 FGC 101 1790 Uen Y BLANK ...
Page 140: ...Getting Started 3 104 1 1553 FGC 101 1790 Uen Y BLANK ...
Page 184: ...Front Panel Control 4 44 1 1553 FGC 101 1790 Uen Y BLANK ...
Page 278: ...Advanced Video Processing and Networking 6 4 1 1553 FGC 101 1790 Uen Y BLANK ...
Page 304: ...Advanced Video Processing and Networking 6 30 1 1553 FGC 101 1790 Uen Y BLANK ...
Page 324: ...Preventive Maintenance and Fault finding 8 4 1 1553 FGC 101 1790 Uen Y BLANK ...
Page 346: ...Preventive Maintenance and Fault finding 8 26 1 1553 FGC 101 1790 Uen Y BLANK ...
Page 386: ...Technical Specification B 20 1 1553 FGC 101 1790 Uen Y BLANK ...
Page 388: ...Dolby E PCM Bypass and Switchout C 2 1 1553 FGC 101 1790 Uen Y BLANK ...
Page 390: ...Dolby E PCM Bypass and Switchout C 4 1 1553 FGC 101 1790 Uen Y BLANK ...
Page 392: ...Alarm Lists D 2 1 1553 FGC 101 1790 Uen X BLANK ...
Page 416: ...Logo Creator E 2 1 1553 FGC 101 1790 Uen Y BLANK ...
Page 422: ...Logo Creator E 8 1 1553 FGC 101 1790 Uen Y BLANK ...