_INTR ENABLED
COMM PORT 1 RCV DMA OVERRUN ENABLED
COMM PORT 1 RCV HALF PAGE INTR
_ENABLED
COMM PORT 1 TRANSMIT DMA MEM READ
_ERR ENABLED
COMM PORT 1 TRANSMIT PAGE END
_INTR ENABLED
Analysis of Example 2
The following list describes the useful
information in ENTRY 7 and ENTRY 8.
ENTRY 7 records the error.
The OS EVENT TYPE field indicates the PANIC type.
The PANIC MESSAGE field indicates that the error is
a bus timeout.
ENTRY 8 records the error and status register values at
the time of the bus timeout error.
The CAUSE register indicates a bus error during a
data load or store operation.
The BAD VIRT ADR register identifies the address of
the timeout.
3–20
Troubleshooting Tools
Summary of Contents for DECstation 5000/100 Series
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Page 140: ...LJ 02971 TI0 MLO 010159 Figure 5 7 50 MHz R4000 based CPU module 5 12 Base System FRUs...
Page 151: ...WS33M076 Figure 5 14 Removing a memory module Base System FRUs 5 23...
Page 153: ...WS33M075 Figure 5 15 Installing a memory module Base System FRUs 5 25...
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