Table D-14 describes error codes and descriptions used in cache
segment test error messages.
Table D-14. Cache Segment Test Error Codes and Descriptions
Error Code and Description
Meaning
(1:
address
=
xxxxxxxx
, sb
yyyyyyyy
)
Error occurred when the system tried
to read the cache contents. The
address
parameter is the actual value at a given
address. The correct value follows.
(2:
address
=
xxxxxxxx
, sb
yyyyyyyy
)
Error occurred when the system tried to
read the memory contents. The
address
parameter is the actual value at a given
address. The correct value follows.
(3:
address
=
xxxxxxxx
, sb
yyyyyyyy
)
Error occurred when the system performed
a read and write operation on the uncached
memory. The
address
value is the actual
value at a given address. The correct value
follows.
(4:
address
=
xxxxxxxx
, sb
yyyyyyyy
Cache data was inconsistent. The address
value is the actual value at a given address.
The correct value follows.
Secondary Cache Test - scache/data
This test run patterns through secondary cache RAM. To run
the scache data test, type
t 3/scache/data
and press Return.
The secondary cache is implemented on the daughter-card as
11 16-bit wide static RAMs. This 176 (11 times 16) wire Scache
interface is divided-up as follows:
25 Tag wires
07 Tag ECC wires
128 Data wires
16 Data ECC wires
Base System Test Commands and Messages
D–31
Summary of Contents for DECstation 5000/100 Series
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Page 151: ...WS33M076 Figure 5 14 Removing a memory module Base System FRUs 5 23...
Page 153: ...WS33M075 Figure 5 15 Installing a memory module Base System FRUs 5 25...
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