Digital Equipment DECstation 5000/100 Series, Maintenance Manual

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bad SIMM, use the bank number to get the correct
bank and use D0-15 or D16-31 to select the low or high
SIMM of the bank.
The PHYSICAL ADDRESS field identifies the physical
address that was being read when the failure was detected.
Since the system uses DMA block read operations (more
than one word is read in a read operation), the parity error
could have occurred in any word in the block. This address
points to only the block being read, not necessarily to the
bad word.
ENTRY 2, occurring prior to a memory parity error,
indicates that the memory parity error was detected by
an I/O device performing a DMA operation from memory.
Using Error and Status Register Error Logs
Error and status register error logs record nonmemory system
errors. The following examples show two kinds of error and
status error events: a CPU write timeout and a bus timeout. In
both examples the event type is PANIC. Therefore, the initial
error log is followed by a related error and status register error
log.
Example 1: Error and status register error log
The first entry in the following example, labeled ENTRY 2,
records a CPU write timeout error. Because the event type is
PANIC, it is followed by a related log, labeled ENTRY 3, that
records the error and status register values at the time of the
error. See Appendix E for detailed information about memory
registers.
Troubleshooting Tools 3–15