Digital Equipment DECstation 5000/100 Series, Maintenance Manual

Page: 364 / 392

Status Register (R3000 Only)
The status register (SR) is a 32-bit read/write register that
contains the kernel/user mode, interrupt enable, and diagnostic
state of the processor. The SR contains a three-level stack
(current, previous, and old) of the kernel/user (KU) bit and
the interrupt enable (IE) bit. The stack is pushed when each
exception is taken. The stack is popped by the restore from
exception (RFE) instruction. These bits can also be directly
read or written.
The status register has the following format:
31 28 27 16
+------------------------------+----------------------+
|
CU | DS |
+------------------------------+----------------------+
18 12
15 8 7 6 5 4 3 2 1 0
+------------+-----+-----+-----+-----+-----+-----+-----+
|
IM | 0 | KUo | IEo | KUp | IEp | KUc | IEc |
+------------+-----+-----+-----+-----+-----+-----+-----+
8 2 1 1 1 1 1 1
The coprocessor usability (CU) field is a 4-bit field that
individually controls the usability of each of the four
coprocessor unit numbers (1 = usable, 0 = unusable).
Coprocessor zero is always usable in kernel mode,
regardless of the setting of the CU0 bit.
The diagnostic status (DS) field is an implementation-
dependent 12-bit diagnostic status field that is used for
self-testing and checking of the cache and virtual memory
system. See the ‘‘Diagnostic status’’ on page E-7 for a
detailed description of the DS field.
The interrupt mask field (IM) is an 8-bit field that controls
the enabling of each of eight external interrupt conditions.
It controls the enabling of each of the external, internal,
coprocessor, and software interrupts (0 = disable, 1 =
enable). If interrupts are enabled, an external interrupt
occurs when corresponding bits are set in both the interrupt
mask field of the SR and the interrupt pending (IP) field
of the cause register. The actual width of this register is
E–8 CPU and System Registers